| /* |
| * Memory map: |
| * |
| * CONFIG_RAMBASE |
| * : data segment |
| * : bss segment |
| * : heap |
| * : stack |
| * CONFIG_ROMBASE |
| * : coreboot text |
| * : readonly text |
| */ |
| /* |
| * Bootstrap code for the STPC Consumer |
| * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. |
| * |
| */ |
| |
| /* |
| * Written by Johan Rydberg, based on work by Daniel Kahlin. |
| * Rewritten by Eric Biederman |
| */ |
| /* |
| * We use ELF as output format. So that we can |
| * debug the code in some form. |
| */ |
| OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") |
| OUTPUT_ARCH(i386) |
| |
| /* |
| ENTRY(_start) |
| */ |
| |
| TARGET(binary) |
| INPUT(coreboot_ram.rom) |
| SECTIONS |
| { |
| . = CONFIG_ROMBASE; |
| |
| .ram . : { |
| _ram = . ; |
| coreboot_ram.rom(*) |
| _eram = . ; |
| } |
| |
| /* cut _start into last 64k*/ |
| _x = .; |
| . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; |
| |
| /* This section might be better named .setup */ |
| .rom . : { |
| _rom = .; |
| *(.rom.text); |
| *(.rom.data); |
| *(.init.rodata.*); |
| *(.rodata.*); |
| *(.rom.data.*); |
| . = ALIGN(16); |
| _erom = .; |
| } |
| |
| _lrom = LOADADDR(.rom); |
| _elrom = LOADADDR(.rom) + SIZEOF(.rom); |
| _iseg = CONFIG_RAMBASE; |
| _eiseg = _iseg + SIZEOF(.ram); |
| _liseg = _ram; |
| _eliseg = _eram; |
| |
| /DISCARD/ : { |
| *(.comment) |
| *(.note) |
| *(.comment.*) |
| *(.note.*) |
| } |
| } |