Pass the CPU index as a parameter to startup.
This addition is in support of future multicore support in
coreboot. It also will allow us to remove some asssembly code.
The CPU "index" -- i.e., its order in the sequence in which
cores are brought up, NOT its APIC id -- is passed into the
secondary start. We modify the function to specify regparm(0).
We also take this opportunity to do some cleanup:
indexes become unsigned ints, not unsigned longs, for example.
Build and boot on a multicore system, with pcserial enabled.
Capture the output. Observe that the messages
Initializing CPU #0
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
appear exactly as they do prior to this change.
Change-Id: I5854d8d957c414f75fdd63fb017d2249330f955d
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/1820
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index a9369fb..e8ea096 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -4,10 +4,10 @@
#include <arch/cpu.h>
#if !defined(__ROMCC__)
-void cpu_initialize(void);
+void cpu_initialize(unsigned int cpu_index);
struct bus;
void initialize_cpus(struct bus *cpu_bus);
-void __attribute__((regparm(0))) secondary_cpu_init(void);
+void __attribute__((regparm(0))) secondary_cpu_init(unsigned int cpu_index);
#if CONFIG_HAVE_SMI_HANDLER
void smm_init(void);