Pass the CPU index as a parameter to startup.
This addition is in support of future multicore support in
coreboot. It also will allow us to remove some asssembly code.
The CPU "index" -- i.e., its order in the sequence in which
cores are brought up, NOT its APIC id -- is passed into the
secondary start. We modify the function to specify regparm(0).
We also take this opportunity to do some cleanup:
indexes become unsigned ints, not unsigned longs, for example.
Build and boot on a multicore system, with pcserial enabled.
Capture the output. Observe that the messages
Initializing CPU #0
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
appear exactly as they do prior to this change.
Change-Id: I5854d8d957c414f75fdd63fb017d2249330f955d
Signed-off-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/1820
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 0dc92fb..aa0412f 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -160,7 +160,7 @@
struct cpu_info {
device_t cpu;
- unsigned long index;
+ unsigned int index;
};
static inline struct cpu_info *cpu_info(void)
diff --git a/src/arch/x86/lib/cpu.c b/src/arch/x86/lib/cpu.c
index 98ede06..be8e38d 100644
--- a/src/arch/x86/lib/cpu.c
+++ b/src/arch/x86/lib/cpu.c
@@ -234,7 +234,7 @@
cpu->ops = driver ? driver->ops : NULL;
}
-void cpu_initialize(void)
+void cpu_initialize(unsigned int index)
{
/* Because we busy wait at the printk spinlock.
* It is important to keep the number of printed messages
@@ -247,7 +247,7 @@
info = cpu_info();
- printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
+ printk(BIOS_INFO, "Initializing CPU #%d\n", index);
cpu = info->cpu;
if (!cpu) {
@@ -284,7 +284,7 @@
cpu->ops->init(cpu);
}
- printk(BIOS_INFO, "CPU #%ld initialized\n", info->index);
+ printk(BIOS_INFO, "CPU #%d initialized\n", index);
return;
}
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 256066f..9dbc80b 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -209,13 +209,14 @@
* for select the stack from assembly language.
*
* In addition communicating by variables to the cpu I
- * am starting allows me to veryify it has started before
+ * am starting allows me to verify it has started before
* start_cpu returns.
*/
static spinlock_t start_cpu_lock = SPIN_LOCK_UNLOCKED;
-static unsigned last_cpu_index = 0;
+static unsigned int last_cpu_index = 0;
volatile unsigned long secondary_stack;
+volatile unsigned int secondary_cpu_index;
void *stacks[CONFIG_MAX_CPUS];
int start_cpu(device_t cpu)
@@ -226,7 +227,7 @@
unsigned long stack_base;
unsigned long *stack;
unsigned long apicid;
- unsigned long index;
+ unsigned int index;
unsigned long count;
int i;
int result;
@@ -243,7 +244,7 @@
stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
stack_base = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*(index+1));
- printk(BIOS_SPEW, "CPU%ld: stack_base %p, stack_end %p\n", index,
+ printk(BIOS_SPEW, "CPU%d: stack_base %p, stack_end %p\n", index,
(void *)stack_base, (void *)stack_end);
/* poison the stack */
for(stack = (void *)stack_base, i = 0; i < CONFIG_STACK_SIZE; i++)
@@ -254,8 +255,9 @@
info->index = index;
info->cpu = cpu;
- /* Advertise the new stack to start_cpu */
+ /* Advertise the new stack and index to start_cpu */
secondary_stack = stack_end;
+ secondary_cpu_index = index;
/* Until the cpu starts up report the cpu is not enabled */
cpu->enabled = 0;
@@ -384,7 +386,7 @@
#endif
/* C entry point of secondary cpus */
-void __attribute__((regparm(0))) secondary_cpu_init(void)
+void __attribute__((regparm(0))) secondary_cpu_init(unsigned int index)
{
atomic_inc(&active_cpus);
#if CONFIG_SERIAL_CPU_INIT
@@ -401,7 +403,7 @@
cr4_val |= (1 << 9 | 1 << 10);
writecr4(cr4_val);
#endif
- cpu_initialize();
+ cpu_initialize(index);
#if CONFIG_SERIAL_CPU_INIT
spin_unlock(&start_cpu_lock);
#endif
@@ -537,7 +539,7 @@
#endif
/* Initialize the bootstrap processor */
- cpu_initialize();
+ cpu_initialize(0);
#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
#if CONFIG_SERIAL_CPU_INIT
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index ec1bd9c..045454e 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -53,6 +53,8 @@
/* Set the stack pointer, and flag that we are done */
xorl %eax, %eax
movl secondary_stack, %esp
+ movl secondary_cpu_index, %edi
+ pushl %edi
movl %eax, secondary_stack
call secondary_cpu_init
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
index a9369fb..e8ea096 100644
--- a/src/include/cpu/cpu.h
+++ b/src/include/cpu/cpu.h
@@ -4,10 +4,10 @@
#include <arch/cpu.h>
#if !defined(__ROMCC__)
-void cpu_initialize(void);
+void cpu_initialize(unsigned int cpu_index);
struct bus;
void initialize_cpus(struct bus *cpu_bus);
-void __attribute__((regparm(0))) secondary_cpu_init(void);
+void __attribute__((regparm(0))) secondary_cpu_init(unsigned int cpu_index);
#if CONFIG_HAVE_SMI_HANDLER
void smm_init(void);