soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming
SA SMRAMC register PCI offset 0x88 is deprecated for ICL, JSL and TGL.
Removing the register programming for these platforms. The write to
this register does not take effect and remains configured to 0, even
when programmed.
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Change-Id: I3f581b90ea99012980f439a7914e8d901585b004
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 45c81ca..2823fd7 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -221,9 +221,6 @@
* start flowing.
*/
global_smi_enable();
-
- /* Lock down the SMRAM space. */
- smm_lock();
}
static const struct mp_ops mp_ops = {
diff --git a/src/soc/intel/icelake/include/soc/systemagent.h b/src/soc/intel/icelake/include/soc/systemagent.h
index 90465a24..ef648a6 100644
--- a/src/soc/intel/icelake/include/soc/systemagent.h
+++ b/src/soc/intel/icelake/include/soc/systemagent.h
@@ -9,12 +9,6 @@
#define EPBAR 0x40
#define DMIBAR 0x68
-#define SMRAM 0x88 /* System Management RAM Control */
-#define D_OPEN (1 << 6)
-#define D_CLS (1 << 5)
-#define D_LCK (1 << 4)
-#define G_SMRAME (1 << 3)
-#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
#define CAPID0_A 0xe4
#define BIOS_RESET_CPL 0x5da8
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c
index f1a7033..a847db9 100644
--- a/src/soc/intel/icelake/smmrelocate.c
+++ b/src/soc/intel/icelake/smmrelocate.c
@@ -17,7 +17,6 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
-#include <soc/systemagent.h>
static void update_save_state(int cpu, uintptr_t curr_smbase,
@@ -234,15 +233,3 @@
else if (!boot_cpu())
smm_initiate_relocation();
}
-
-void smm_lock(void)
-{
- struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
- /*
- * LOCK the SMM memory window and enable normal SMM.
- * After running this function, only a full reset can
- * make the SMM registers writable again.
- */
- printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(sa_dev, SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
-}
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index 99cbef2..3a50929 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -185,9 +185,6 @@
* start flowing.
*/
global_smi_enable();
-
- /* Lock down the SMRAM space. */
- smm_lock();
}
static const struct mp_ops mp_ops = {
diff --git a/src/soc/intel/jasperlake/include/soc/systemagent.h b/src/soc/intel/jasperlake/include/soc/systemagent.h
index 2ad98f7..e21c9af 100644
--- a/src/soc/intel/jasperlake/include/soc/systemagent.h
+++ b/src/soc/intel/jasperlake/include/soc/systemagent.h
@@ -9,12 +9,6 @@
#define EPBAR 0x40
#define DMIBAR 0x68
-#define SMRAM 0x88 /* System Management RAM Control */
-#define D_OPEN (1 << 6)
-#define D_CLS (1 << 5)
-#define D_LCK (1 << 4)
-#define G_SMRAME (1 << 3)
-#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
#define CAPID0_A 0xe4
#define VTD_DISABLE (1 << 23)
diff --git a/src/soc/intel/jasperlake/smmrelocate.c b/src/soc/intel/jasperlake/smmrelocate.c
index 664ea6c..bbdcb68 100644
--- a/src/soc/intel/jasperlake/smmrelocate.c
+++ b/src/soc/intel/jasperlake/smmrelocate.c
@@ -17,7 +17,6 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
-#include <soc/systemagent.h>
static void update_save_state(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase,
@@ -233,15 +232,3 @@
else if (!boot_cpu())
smm_initiate_relocation();
}
-
-void smm_lock(void)
-{
- struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
- /*
- * LOCK the SMM memory window and enable normal SMM.
- * After running this function, only a full reset can
- * make the SMM registers writable again.
- */
- printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(sa_dev, SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
-}
diff --git a/src/soc/intel/tigerlake/cpu.c b/src/soc/intel/tigerlake/cpu.c
index 9a96f8f..be056fb 100644
--- a/src/soc/intel/tigerlake/cpu.c
+++ b/src/soc/intel/tigerlake/cpu.c
@@ -191,9 +191,6 @@
* start flowing.
*/
global_smi_enable();
-
- /* Lock down the SMRAM space. */
- smm_lock();
}
static const struct mp_ops mp_ops = {
diff --git a/src/soc/intel/tigerlake/include/soc/systemagent.h b/src/soc/intel/tigerlake/include/soc/systemagent.h
index 3e43843..fca9b2b 100644
--- a/src/soc/intel/tigerlake/include/soc/systemagent.h
+++ b/src/soc/intel/tigerlake/include/soc/systemagent.h
@@ -15,12 +15,6 @@
#define EPBAR 0x40
#define DMIBAR 0x68
-#define SMRAM 0x88 /* System Management RAM Control */
-#define D_OPEN (1 << 6)
-#define D_CLS (1 << 5)
-#define D_LCK (1 << 4)
-#define G_SMRAME (1 << 3)
-#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
#define CAPID0_A 0xe4
#define VTD_DISABLE (1 << 23)
diff --git a/src/soc/intel/tigerlake/smmrelocate.c b/src/soc/intel/tigerlake/smmrelocate.c
index 664ea6c..bbdcb68 100644
--- a/src/soc/intel/tigerlake/smmrelocate.c
+++ b/src/soc/intel/tigerlake/smmrelocate.c
@@ -17,7 +17,6 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
-#include <soc/systemagent.h>
static void update_save_state(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase,
@@ -233,15 +232,3 @@
else if (!boot_cpu())
smm_initiate_relocation();
}
-
-void smm_lock(void)
-{
- struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
- /*
- * LOCK the SMM memory window and enable normal SMM.
- * After running this function, only a full reset can
- * make the SMM registers writable again.
- */
- printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(sa_dev, SMRAM, D_LCK | G_SMRAME | C_BASE_SEG);
-}