siemens/mc_apl3: Remove reduced clock rate for I2C0
There is no device on I2C0 which requires a lower clock rate.
Change-Id: Ib9ad4d9026267d2079e95245994d84c163b28dbb
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/29504
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
index 13ac4b5..bb3bf6f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
@@ -46,18 +46,6 @@
# 0:HS400(Default), 1:HS200, 2:DDR50
register "emmc_host_max_speed" = "2"
- # Intel Common SoC Config
- #+-------------------+---------------------------+
- #| Field | Value |
- #+-------------------+---------------------------+
- #| I2C0 | Proximity Sensor |
- #+-------------------+---------------------------+
- register "common_soc_config" = "{
- .i2c[0] = {
- .speed = I2C_SPEED_STANDARD
- },
- }"
-
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 off end # - DPTF