soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option
SF Mask MSRs' Programming which was done under this config
selection will be moved under a new config option called
CAR_HAS_SF_MASKS. This segregates the eNEM programming
sequence based on sub features supported in each processor.
Bug=b:171601324
BRANCH=volteer
Test=Build volteer build and boot on Delbin EVT.
Change-Id: If4d8d1ec52b7b79965fe1a957c48f571ec56dc63
Signed-off-by: Shreesh Chhabbi <shreesh.chhabbi@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 3eae5f8..cfc7c52 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -31,6 +31,8 @@
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
select HAVE_INTEL_FSP_REPO
+ select INTEL_CAR_NEM_ENHANCED
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select INTEL_DESCRIPTOR_MODE_CAPABLE
select INTEL_GMA_ACPI
@@ -77,7 +79,6 @@
select TSC_SYNC_MFENCE
select UDELAY_TSC
select UDK_2015_BINDING
- select USE_CAR_NEM_ENHANCED_V1
config FSP_HYPERTHREADING
bool "Enable Hyper-Threading"