tree c6276bf0cffe9c8cd436689665b1814757cb92f6
parent 1fa16c9cb6c486cdd4b1bcb3734308b28b9c9a22
author Aamir Bohra <aamir.bohra@intel.com> 1495701721 +0530
committer Aaron Durbin <adurbin@chromium.org> 1496615568 +0200

soc/intel/skylake: Use Intel timer common code

Use timer  code from  soc/intel/common. This code removes
monotonic timer refrence w.r.t MSR 24Mhz counter(0x637)
and use tsc timer.

Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>