soc/intel/skylake: Perform LPC offset read after lockdown operation

This patch is to provide an additional read LPC pci offset register
BIOS_CONTROL (BC) - offset 0xDC to ensure that the last write is
successful.

Change-Id: I308c0622d348fc96c410a04ab4081bb6af98e874
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
1 file changed