| /* SPDX-License-Identifier: GPL-2.0-only */ |
| |
| #ifndef NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H |
| #define NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H |
| |
| #define MCH_BASE_SIZE 0x8000 |
| |
| #define DMI_BASE_SIZE 0x1000 |
| |
| #define EP_BASE_SIZE 0x1000 |
| |
| #define EDRAM_BASE_ADDRESS 0xfed80000 |
| #define EDRAM_BASE_SIZE 0x4000 |
| |
| #define GDXC_BASE_ADDRESS 0xfed84000 |
| #define GDXC_BASE_SIZE 0x1000 |
| |
| #define GFXVT_BASE_ADDRESS 0xfed90000ULL |
| #define GFXVT_BASE_SIZE 0x1000 |
| |
| #define VTVC0_BASE_ADDRESS 0xfed91000ULL |
| #define VTVC0_BASE_SIZE 0x1000 |
| |
| #endif /* NORTHBRIDGE_INTEL_HASWELL_MEMMAP_H */ |