Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
78ba7a7865ed1f60c7f55bfcced305bc8fbdc9c6
/
.
/
src
/
soc
/
ucb
/
riscv
/
chip.c
blob: 2e0f528128eb097e3eb9dd4e4689f57d9eef1396 [
file
] [
log
] [
blame
]
/* SPDX-License-Identifier: GPL-2.0-only */
#include
<device/device.h>
struct
chip_operations soc_ucb_riscv_ops
=
{
.
name
=
"UCB RISC-V"
,
};