fsp: Move fsp to fsp1_0
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific
directory. See follow-on patches for sharing of common code.
Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/9970
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/Kconfig b/src/Kconfig
index d7fff15..f531f07 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -335,7 +335,7 @@
source "src/ec/*/*/Kconfig"
comment "SoC"
source "src/soc/*/*/Kconfig"
-source "src/drivers/intel/fsp/Kconfig"
+source "src/drivers/intel/fsp1_0/Kconfig"
endmenu
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index da0e76f..b0991bc 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -30,7 +30,7 @@
cbfs_include_ucode = y
endif
-ifeq ($(CONFIG_PLATFORM_USES_FSP), y)
+ifeq ($(CONFIG_PLATFORM_USES_FSP1_0), y)
cpu_ucode_cbfs_offset = "-b $(CONFIG_CPU_MICROCODE_CBFS_LOC)"
else
cpu_ucode_cbfs_offset = "-b"
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 05bdce4..71deb3a 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -28,7 +28,7 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index ec4be84..7813969 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -24,7 +24,7 @@
config CPU_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index 41c2288..21a0fac 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -105,12 +105,12 @@
This option informs the MTRR code to use the RdMem and WrMem fields
in the fixed MTRR MSRs.
-config PLATFORM_USES_FSP
+config PLATFORM_USES_FSP1_0
bool
default n
help
Selected for Intel processors/platform combinations that use the
- Intel Firmware Support Package (FSP) for initialization.
+ Intel Firmware Support Package (FSP) 1.0 for initialization.
config PARALLEL_MP
def_bool n
diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c
index 18d74b2..342a179 100644
--- a/src/cpu/x86/car.c
+++ b/src/cpu/x86/car.c
@@ -23,8 +23,8 @@
#include <cbmem.h>
#include <arch/early_variables.h>
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
-#include <drivers/intel/fsp/fsp_util.h>
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
+#include <drivers/intel/fsp1_0/fsp_util.h>
#endif
typedef void (* const car_migration_func_t)(void);
@@ -67,7 +67,7 @@
return var;
}
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
migrated_base=(char *)find_saved_temp_mem(
*(void **)CBMEM_FSP_HOB_PTR);
#else
@@ -100,7 +100,7 @@
if (*mig_var < _car_start || *mig_var > _car_end)
return mig_var;
-#if !IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#if !IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_0)
/* Keep console buffer in CAR until cbmemc_reinit() moves it. */
if (*mig_var == _car_end)
return mig_var;
@@ -149,7 +149,7 @@
void car_migrate_variables(void)
{
- if (!IS_ENABLED(PLATFORM_USES_FSP))
+ if (!IS_ENABLED(PLATFORM_USES_FSP1_0))
do_car_migrate_variables();
do_car_migrate_hooks();
diff --git a/src/drivers/intel/Makefile.inc b/src/drivers/intel/Makefile.inc
index dba81b5..dc947ff 100644
--- a/src/drivers/intel/Makefile.inc
+++ b/src/drivers/intel/Makefile.inc
@@ -1,4 +1,4 @@
subdirs-y += gma
subdirs-y += wifi
-subdirs-$(CONFIG_PLATFORM_USES_FSP) += fsp
+subdirs-$(CONFIG_PLATFORM_USES_FSP1_0) += fsp1_0
subdirs-$(CONFIG_DRIVER_INTEL_I210) += i210
diff --git a/src/drivers/intel/fsp/Kconfig b/src/drivers/intel/fsp1_0/Kconfig
similarity index 98%
rename from src/drivers/intel/fsp/Kconfig
rename to src/drivers/intel/fsp1_0/Kconfig
index 2d41365..2492298 100644
--- a/src/drivers/intel/fsp/Kconfig
+++ b/src/drivers/intel/fsp1_0/Kconfig
@@ -17,7 +17,7 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-if PLATFORM_USES_FSP
+if PLATFORM_USES_FSP1_0
comment "Intel FSP"
@@ -142,4 +142,4 @@
default n
help
If this FSP uses UPD/VPD data regions, select this in the chipset Kconfig.
-endif #PLATFORM_USES_FSP
+endif #PLATFORM_USES_FSP1_0
diff --git a/src/drivers/intel/fsp/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc
similarity index 93%
rename from src/drivers/intel/fsp/Makefile.inc
rename to src/drivers/intel/fsp1_0/Makefile.inc
index 71d676d..4931cb7 100644
--- a/src/drivers/intel/fsp/Makefile.inc
+++ b/src/drivers/intel/fsp1_0/Makefile.inc
@@ -23,10 +23,10 @@
ramstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c
-CPPFLAGS_common += -Isrc/drivers/intel/fsp
+CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0
ifeq ($(CONFIG_USE_GENERIC_FSP_CAR_INC),y)
-cpu_incs += $(src)/drivers/intel/fsp/cache_as_ram.inc
+cpu_incs += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc
endif
ifeq ($(CONFIG_HAVE_FSP_BIN),y)
diff --git a/src/drivers/intel/fsp/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc
similarity index 100%
rename from src/drivers/intel/fsp/cache_as_ram.inc
rename to src/drivers/intel/fsp1_0/cache_as_ram.inc
diff --git a/src/drivers/intel/fsp/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c
similarity index 100%
rename from src/drivers/intel/fsp/fastboot_cache.c
rename to src/drivers/intel/fsp1_0/fastboot_cache.c
diff --git a/src/drivers/intel/fsp/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
similarity index 100%
rename from src/drivers/intel/fsp/fsp_util.c
rename to src/drivers/intel/fsp1_0/fsp_util.c
diff --git a/src/drivers/intel/fsp/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h
similarity index 100%
rename from src/drivers/intel/fsp/fsp_util.h
rename to src/drivers/intel/fsp1_0/fsp_util.h
diff --git a/src/drivers/intel/fsp/fsp_values.h b/src/drivers/intel/fsp1_0/fsp_values.h
similarity index 100%
rename from src/drivers/intel/fsp/fsp_values.h
rename to src/drivers/intel/fsp1_0/fsp_values.h
diff --git a/src/drivers/intel/fsp/hob.c b/src/drivers/intel/fsp1_0/hob.c
similarity index 100%
rename from src/drivers/intel/fsp/hob.c
rename to src/drivers/intel/fsp1_0/hob.c
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index ef848fa..9a08b08 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -36,7 +36,7 @@
#include <baytrail/romstage.h>
#include <baytrail/acpi.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
/**
* /brief mainboard call for setup that needs to be done before fsp init
diff --git a/src/mainboard/intel/minnowmax/romstage.c b/src/mainboard/intel/minnowmax/romstage.c
index d8fd04a..656c7b4 100644
--- a/src/mainboard/intel/minnowmax/romstage.c
+++ b/src/mainboard/intel/minnowmax/romstage.c
@@ -20,7 +20,7 @@
*/
#include <baytrail/romstage.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <baytrail/gpio.h>
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index e06682c..6218e38 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -23,7 +23,7 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <southbridge/intel/fsp_rangeley/gpio.h>
#include <southbridge/intel/fsp_rangeley/romstage.h>
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index 5274529..2866a2c 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -36,7 +36,7 @@
#include <baytrail/romstage.h>
#include <baytrail/acpi.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "modhwinfo.h"
/**
diff --git a/src/northbridge/intel/fsp_rangeley/chip.h b/src/northbridge/intel/fsp_rangeley/chip.h
index a8d0a1f..02a69b9 100644
--- a/src/northbridge/intel/fsp_rangeley/chip.h
+++ b/src/northbridge/intel/fsp_rangeley/chip.h
@@ -22,7 +22,7 @@
#define _FSP_RANGELEY_CHIP_H_
#include <arch/acpi.h>
-#include <drivers/intel/fsp/fsp_values.h>
+#include <drivers/intel/fsp1_0/fsp_values.h>
struct northbridge_intel_fsp_rangeley_config {
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
index 82eceda..82d62c5 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
+++ b/src/northbridge/intel/fsp_rangeley/fsp/Kconfig
@@ -19,7 +19,7 @@
config RANGELEY_FSP_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select USE_GENERIC_FSP_CAR_INC
select FSP_USES_UPD
select ENABLE_MRC_CACHE #rangeley FSP always needs MRC data
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index 949cf2a..3a4cd6e 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -25,7 +25,7 @@
#include <cbmem.h>
#include <device/device.h>
#include <southbridge/intel/fsp_rangeley/pci_devs.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <fspvpd.h>
#include <fspbootmode.h>
#include <reset.h>
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index be3a3ac..14d0853 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -35,7 +35,7 @@
#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <cpu/x86/lapic.h>
static int bridge_revision_id = -1;
diff --git a/src/northbridge/intel/fsp_rangeley/raminit.c b/src/northbridge/intel/fsp_rangeley/raminit.c
index 9626745..c920f9d 100644
--- a/src/northbridge/intel/fsp_rangeley/raminit.c
+++ b/src/northbridge/intel/fsp_rangeley/raminit.c
@@ -24,7 +24,7 @@
#include <cbmem.h>
#include <device/pci_def.h>
#include "northbridge.h"
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
static uintptr_t smm_region_start(void)
{
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
index 03999618..0b4ca97 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/Kconfig
@@ -19,7 +19,7 @@
config SANDYBRIDGE_FSP_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select USE_GENERIC_FSP_CAR_INC
select FSP_USES_UPD if SOUTHBRIDGE_INTEL_FSP_I89XX
diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
index a800600..1f421df 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h
+++ b/src/soc/intel/fsp_baytrail/baytrail/romstage.h
@@ -29,7 +29,7 @@
#include <stdint.h>
#include <arch/cpu.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
void main(FSP_INFO_HEADER *fsp_info_header);
void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index 732d1dc..d26b64a 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -22,7 +22,7 @@
#include <device/pci.h>
#include <baytrail/pci_devs.h>
#include <baytrail/ramstage.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "chip.h"
static void pci_domain_set_resources(device_t dev)
diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h
index 6e83ef2..9a2edfe 100644
--- a/src/soc/intel/fsp_baytrail/chip.h
+++ b/src/soc/intel/fsp_baytrail/chip.h
@@ -23,7 +23,7 @@
#define _FSP_BAYTRAIL_CHIP_H_
#include <arch/acpi.h>
-#include <drivers/intel/fsp/fsp_values.h>
+#include <drivers/intel/fsp1_0/fsp_values.h>
/* The devicetree parser expects chip.h to reside directly in the path
* specified by the devicetree. */
diff --git a/src/soc/intel/fsp_baytrail/fsp/Kconfig b/src/soc/intel/fsp_baytrail/fsp/Kconfig
index cbe3a95..252c41f 100644
--- a/src/soc/intel/fsp_baytrail/fsp/Kconfig
+++ b/src/soc/intel/fsp_baytrail/fsp/Kconfig
@@ -19,7 +19,7 @@
config BAYTRAIL_FSP_SPECIFIC_OPTIONS
def_bool y
- select PLATFORM_USES_FSP
+ select PLATFORM_USES_FSP1_0
select USE_GENERIC_FSP_CAR_INC
select FSP_USES_UPD
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index b8c1bf6..eb068ba 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -26,7 +26,7 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <baytrail/pci_devs.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "../chip.h"
#include <arch/io.h>
#include <baytrail/reset.h>
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 480bbeb..5f31430 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -22,7 +22,7 @@
#include <cbmem.h>
#include <baytrail/iosf.h>
#include <baytrail/smm.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
uintptr_t smm_region_start(void)
{
diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c
index b288388..2238a8a 100644
--- a/src/soc/intel/fsp_baytrail/northcluster.c
+++ b/src/soc/intel/fsp_baytrail/northcluster.c
@@ -31,7 +31,7 @@
#include <device/pci.h>
#include <cbmem.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
static const int legacy_hole_base_k = 0xa0000 / 1024;
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 81a0279..3c4098f 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -37,7 +37,7 @@
#include <baytrail/romstage.h>
#include <baytrail/acpi.h>
#include <baytrail/baytrail.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include <baytrail/pmc.h>
#include <baytrail/spi.h>
#include <version.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index e6b4f62..9596c7c 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -29,7 +29,7 @@
#include <pc80/mc146818rtc.h>
#include <cbmem.h>
#include <console/console.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
#include "northbridge/intel/fsp_rangeley/northbridge.h"
#include "southbridge/intel/fsp_rangeley/soc.h"
#include "southbridge/intel/fsp_rangeley/gpio.h"
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.h b/src/southbridge/intel/fsp_rangeley/romstage.h
index 4afce5f..a421953 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.h
+++ b/src/southbridge/intel/fsp_rangeley/romstage.h
@@ -27,7 +27,7 @@
#include <stdint.h>
#include <arch/cpu.h>
-#include <drivers/intel/fsp/fsp_util.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
void main(FSP_INFO_HEADER *fsp_info_header);
void early_mainboard_romstage_entry(void);
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig
index 21b48ae..312f4de 100644
--- a/src/vendorcode/intel/Kconfig
+++ b/src/vendorcode/intel/Kconfig
@@ -19,7 +19,7 @@
config FSP_VENDORCODE_HEADER_PATH
string
- default "fsp/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X
- default "fsp/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX
- default "fsp/baytrail" if SOC_INTEL_FSP_BAYTRAIL
- default "fsp/rangeley" if CPU_INTEL_FSP_MODEL_406DX
+ default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X
+ default "fsp1_0/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX
+ default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL
+ default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX
diff --git a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_1gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/absf/minnowmax_1gb.absf
rename to src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_1gb.absf
diff --git a/src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf b/src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/absf/minnowmax_2gb.absf
rename to src/vendorcode/intel/fsp1_0/baytrail/absf/minnowmax_2gb.absf
diff --git a/src/vendorcode/intel/fsp/baytrail/include/azalia.h b/src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/azalia.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/azalia.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsp.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fsp.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fsp.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspapi.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspapi.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspffs.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspffs.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspfv.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspfv.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsphob.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fsphob.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspinfoheader.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspplatform.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fsptypes.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/baytrail/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/include/fspvpd.h
rename to src/vendorcode/intel/fsp1_0/baytrail/include/fspvpd.h
diff --git a/src/vendorcode/intel/fsp/baytrail/srx/board_fsp.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/srx/board_fsp.c
rename to src/vendorcode/intel/fsp1_0/baytrail/srx/board_fsp.c
diff --git a/src/vendorcode/intel/fsp/baytrail/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
similarity index 100%
rename from src/vendorcode/intel/fsp/baytrail/srx/fsphob.c
rename to src/vendorcode/intel/fsp1_0/baytrail/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspapi.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspffs.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspfv.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsphob.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspinfoheader.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fspplatform.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/fsptypes.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/mem_config.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/mem_config.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/include/peifsp.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/include/peifsp.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_bd82x6x/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_bd82x6x/srx/fsphob.c
rename to src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsp_vpd.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsp_vpd.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspapi.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspffs.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspffs.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspfv.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspfv.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsphob.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsphob.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspinfoheader.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fspplatform.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/fsptypes.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/mem_config.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/mem_config.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/mem_config.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/include/peifsp.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/include/peifsp.h
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/peifsp.h
diff --git a/src/vendorcode/intel/fsp/ivybridge_i89xx/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
similarity index 100%
rename from src/vendorcode/intel/fsp/ivybridge_i89xx/srx/fsphob.c
rename to src/vendorcode/intel/fsp1_0/ivybridge_i89xx/srx/fsphob.c
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspapi.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspapi.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspapi.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspbootmode.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspbootmode.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspbootmode.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspffs.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspffs.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspffs.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspfv.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspfv.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspfv.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fsphob.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fsphob.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fsphob.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspinfoheader.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspinfoheader.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspinfoheader.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspplatform.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspplatform.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspplatform.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fsptypes.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fsptypes.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fsptypes.h
diff --git a/src/vendorcode/intel/fsp/rangeley/include/fspvpd.h b/src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/include/fspvpd.h
rename to src/vendorcode/intel/fsp1_0/rangeley/include/fspvpd.h
diff --git a/src/vendorcode/intel/fsp/rangeley/srx/fsphob.c b/src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c
similarity index 100%
rename from src/vendorcode/intel/fsp/rangeley/srx/fsphob.c
rename to src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c