blob: 87fedfe30a4e09f5992563f318f7e95c52cbe5d6 [file] [log] [blame]
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2011-2012 Google Inc.
* Copyright (C) 2014 Vladimir Serbinenko
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <string.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <drivers/intel/gma/int15.h>
#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/interrupt.h>
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <smbios.h>
#include <device/pci.h>
#include <cbfs.h>
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
#include <build.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
const char *smbios_mainboard_bios_version(void)
{
/* Satisfy thinkpad_acpi. */
if (strlen(CONFIG_LOCALVERSION))
return "CBET4000 " CONFIG_LOCALVERSION;
else
return "CBET4000 " COREBOOT_VERSION;
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;
RCBA32(0x38c4) = 0x00802005;
RCBA32(0x38c0) = 0x00000007;
/* This sneaked in here, because X201 SuperIO chip isn't really
connected to anything and hence we don't init it.
*/
pc_keyboard_init();
/* Enable expresscard hotplug events. */
pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
0xd8,
pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), 0xd8)
| (1 << 30));
pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x1c, 3)),
0x42, 0x142);
}
// mainboard_enable is executed as first thing after
// enumerate_buses().
static void mainboard_enable(device_t dev)
{
dev->ops->init = mainboard_init;
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
}
void h8_mainboard_init_dock (void)
{
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};