| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| # ----------------------------------------------------------------- |
| entries |
| |
| # ----------------------------------------------------------------- |
| # Status Register A |
| # ----------------------------------------------------------------- |
| # Status Register B |
| # ----------------------------------------------------------------- |
| # Status Register C |
| #96 4 r 0 status_c_rsvd |
| #100 1 r 0 uf_flag |
| #101 1 r 0 af_flag |
| #102 1 r 0 pf_flag |
| #103 1 r 0 irqf_flag |
| # ----------------------------------------------------------------- |
| # Status Register D |
| #104 7 r 0 status_d_rsvd |
| #111 1 r 0 valid_cmos_ram |
| # ----------------------------------------------------------------- |
| # Diagnostic Status Register |
| #112 8 r 0 diag_rsvd1 |
| |
| # ----------------------------------------------------------------- |
| 0 120 r 0 reserved_memory |
| #120 264 r 0 unused |
| |
| # ----------------------------------------------------------------- |
| # RTC_BOOT_BYTE (coreboot hardcoded) |
| 384 1 e 4 boot_option |
| 388 4 h 0 reboot_counter |
| #390 2 r 0 unused? |
| |
| # ----------------------------------------------------------------- |
| # coreboot config options: console |
| #392 3 r 0 unused |
| 395 4 e 6 debug_level |
| #399 1 r 0 unused |
| |
| # coreboot config options: southbridge |
| 408 1 e 1 nmi |
| 409 2 e 7 power_on_after_fail |
| |
| #411 10 r 0 unused |
| 421 1 e 9 sata_mode |
| #422 2 r 0 unused |
| |
| # coreboot config options: cpu |
| #425 7 r 0 unused |
| |
| # coreboot config options: northbridge |
| 432 3 e 11 gfx_uma_size |
| #435 549 r 0 unused |
| |
| # coreboot config options: check sums |
| 984 16 h 0 check_sum |
| |
| # ----------------------------------------------------------------- |
| |
| enumerations |
| |
| #ID value text |
| 1 0 Disable |
| 1 1 Enable |
| 4 0 Fallback |
| 4 1 Normal |
| 6 0 Emergency |
| 6 1 Alert |
| 6 2 Critical |
| 6 3 Error |
| 6 4 Warning |
| 6 5 Notice |
| 6 6 Info |
| 6 7 Debug |
| 6 8 Spew |
| 7 0 Disable |
| 7 1 Enable |
| 7 2 Keep |
| 9 0 AHCI |
| 9 1 IDE |
| 11 0 32M |
| 11 1 64M |
| 11 2 96M |
| 11 3 128M |
| 11 4 160M |
| 11 5 192M |
| 11 6 224M |
| |
| # ----------------------------------------------------------------- |
| checksums |
| |
| checksum 392 439 984 |