| /* SPDX-License-Identifier: GPL-2.0-only */ |
| /* This file is part of the coreboot project. */ |
| |
| #define DPTF_CPU_DEVICE TCPU |
| #define DPTF_CPU_ADDR 0x00000001 |
| |
| #ifndef DPTF_CPU_PASSIVE |
| #define DPTF_CPU_PASSIVE 80 |
| #endif |
| |
| #ifndef DPTF_CPU_CRITICAL |
| #define DPTF_CPU_CRITICAL 90 |
| #endif |
| |
| #ifndef DPTF_CPU_ACTIVE_AC0 |
| #define DPTF_CPU_ACTIVE_AC0 90 |
| #endif |
| |
| #ifndef DPTF_CPU_ACTIVE_AC1 |
| #define DPTF_CPU_ACTIVE_AC1 80 |
| #endif |
| |
| #ifndef DPTF_CPU_ACTIVE_AC2 |
| #define DPTF_CPU_ACTIVE_AC2 70 |
| #endif |
| |
| #ifndef DPTF_CPU_ACTIVE_AC3 |
| #define DPTF_CPU_ACTIVE_AC3 60 |
| #endif |
| |
| #ifndef DPTF_CPU_ACTIVE_AC4 |
| #define DPTF_CPU_ACTIVE_AC4 50 |
| #endif |