soc/intel/braswell: add LPEA resources to southcluster.asl
The LPEA device memory resources, required by Windows drivers,
were not being set. Allocate required resources per Inte'sl CHT
Tianocore reference code.
Test: boot Windows on google/edgar, observe LPEA device working properly.
Change-Id: Ic3ecfc2ddade7d76dbaa95ffdd82599c3bcf35da
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 19a58d1..f7e3168 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -153,6 +153,12 @@
0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
0x00010000,,, FSEG)
+ /* LPEA Memory Region (0x20000000-0x201FFFFF) */
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x20000000, 0x201FFFFF, 0x00000000,
+ 0x00200000,,, LMEM)
+
/* PCI Memory Region (Top of memory-0xfeafffff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite,
@@ -166,6 +172,23 @@
0x00005000,,, TPMR)
})
+ /* Update LPEA resource area */
+ CreateDWordField (MCRS, LMEM._MIN, LMIN)
+ CreateDWordField (MCRS, LMEM._MAX, LMAX)
+ CreateDWordField (MCRS, LMEM._LEN, LLEN)
+ If (LAnd (LNotEqual (LPFW, Zero), LEqual (LPEN, One)))
+ {
+ Store (LPFW, LMIN)
+ Store (Add (LMIN, 0x001FFFFF), LMAX)
+ Store (0x00200000, LLEN)
+ }
+ Else
+ {
+ Store (Zero, LMIN)
+ Store (Zero, LMAX)
+ Store (Zero, LLEN)
+ }
+
/* Update PCI resource area */
CreateDwordField(MCRS, PMEM._MIN, PMIN)
CreateDwordField(MCRS, PMEM._MAX, PMAX)