soc/intel/xeon_sp/spr: Add common device tree
Add common device tree used for EGS platform. Also add register
setting shared for all EGS platform.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I812f621ee9d1643fd4fa35df92443d64f7aaabc3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Simon Chou <simonchou@supermicro.com.tw>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index 0c60f8c..b1d92cf 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -8,6 +8,10 @@
select SAVE_MRC_AFTER_FSPS
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
+config CHIPSET_DEVICETREE
+ string
+ default "soc/intel/xeon_sp/spr/chipset.cb"
+
config FSP_HEADER_PATH
string "Location of FSP headers"
depends on MAINBOARD_USES_FSP2_0