northbridge: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.
Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 909e740..b758c61 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -42,9 +42,9 @@
//#define VALIDATE_DIMM_COMPATIBILITY
#if CONFIG_DEBUG_RAM_SETUP
-#define RAM_DEBUG_MESSAGE(x) print_debug(x)
-#define RAM_DEBUG_HEX32(x) print_debug_hex32(x)
-#define RAM_DEBUG_HEX8(x) print_debug_hex8(x)
+#define RAM_DEBUG_MESSAGE(x) printk(BIOS_DEBUG, x)
+#define RAM_DEBUG_HEX32(x) printk(BIOS_DEBUG, "%08x", x)
+#define RAM_DEBUG_HEX8(x) printk(BIOS_DEBUG, "%02x", x)
#define DUMPNORTH() dump_pci_device(MCHDEV)
#else
#define RAM_DEBUG_MESSAGE(x)
@@ -605,7 +605,7 @@
spd_read_byte(channel1_dimm, SPD_MODULE_ATTRIBUTES);
if (!(spd_value & MODULE_REGISTERED) || (spd_value < 0)) {
- print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+ printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
continue;
}
#ifdef VALIDATE_DIMM_COMPATIBILITY
@@ -633,11 +633,11 @@
// Made it through all the checks, this DIMM pair is usable
dimm_mask |= ((1 << i) | (1 << (MAX_DIMM_SOCKETS_PER_CHANNEL + i)));
} else
- print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+ printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
#else
switch (bDualChannel) {
case 0:
- print_debug("Skipping un-matched DIMMs - only dual-channel operation supported\n");
+ printk(BIOS_DEBUG, "Skipping un-matched DIMMs - only dual-channel operation supported\n");
break;
default:
@@ -1379,13 +1379,13 @@
die_on_spd_error(value);
value &= 0x7f; // Mask off self-refresh bit
if (value > MAX_SPD_REFRESH_RATE) {
- print_err("unsupported refresh rate\n");
+ printk(BIOS_ERR, "unsupported refresh rate\n");
continue;
}
// Get the appropriate E7501 refresh mode for this DIMM
dimm_refresh_mode = refresh_rate_map[value];
if (dimm_refresh_mode > 7) {
- print_err("unsupported refresh rate\n");
+ printk(BIOS_ERR, "unsupported refresh rate\n");
continue;
}
// If this DIMM requires more frequent refresh than others,
@@ -1767,7 +1767,7 @@
dimm_mask = spd_get_supported_dimms(ctrl);
if (dimm_mask == 0) {
- print_debug("No usable memory for this controller\n");
+ printk(BIOS_DEBUG, "No usable memory for this controller\n");
} else {
enable_e7501_clocks(dimm_mask);