cpu/intel/model_206ax: Allow to configure VR settings
Allow to set board specific CPU voltage regulator settings.
The VR12 compatible voltage regulator for the CPU can be configured
by two MSRs. Currently a default value is applied, which mimics the
Intel reference code and is what the BWG suggest. However most board
vendors fill in the actual VR parameters to support OC or ULV board
variants.
When the mainboard design is too different from the Intel reference
design, not updating the VR settings might result in:
- unstable system behaviour
- limited turbo performance
- excessive battery drain
- no over-clocking capability
This patch adds support to set the board specific current limit for
Icc and Igfx.
It also allows to adjust PSI1, PSI2 and PSI3, which are powerstates
used by the VR, that consume less energy when the system is idle.
Test on Lenovo X220 with full CPU load after 1 minute, compared to
previous code with default settings:
- Limiting PP0 max current below Iccmax results in less CPU performance.
RAPL readings show that less power is drawn over time.
- Limiting PP0 max current to Iccmax results in equal CPU performance.
RAPL readings show that the same power is drawn over time.
- Setting the PP0 max current to a value >> Iccmax results in equal CPU
performance. RAPL readings show that the same power is drawn over
time.
- Updating the MSR at runtime has no effect.
Change-Id: I59edab47fc4fbe0240e1dd7d25647f7549b4def2
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 233f690..dc2f4a5 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -35,6 +35,20 @@
{ 1, 7, 0x0080 },
{ 1, 6, 0x0080 },}"
+ chip cpu/intel/model_206ax
+ # Values obtained from vendor BIOS v1.46
+ # schematics say 33Amps for 17W TDP, 53Amps for 35W TDP
+ register "pp0_current_limit" = "98"
+ # schematics say 33Amps for GFX
+ register "pp1_current_limit" = "33"
+ register "pp0_psi[VR12_PSI1]" = "{VR12_2_PHASES, 20}"
+ register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
+ register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
+ register "pp1_psi[VR12_PSI1]" = "{VR12_2_PHASES, 20}"
+ register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
+ register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
+ device cpu_cluster 0 on end
+ end
device domain 0 on
subsystemid 0x17aa 0x21db inherit