blob: a39622cea3536855768303991ba9e7330b00830f [file] [log] [blame]
chip soc/intel/cannonlake
device domain 0 on
subsystemid 0x1558 0x1404 inherit
device pci 14.0 on # USB xHCI
# USB2
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # 3G / LTE
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 3
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB Board port 4
register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
# USB3
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 4G
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 3
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB Board port 4
register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Used by TBT
register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Used by TBT
end
device pci 15.0 on # I2C #0
chip drivers/i2c/hid
register "generic.hid" = ""SYNA1202""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C23_IRQ)"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
end
device pci 17.0 on # SATA
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[2]" = "1"
end
device pci 1c.4 on # PCI Express Port 5
# PCI Express Root port #5 x4, Clock 4 (TBT)
register "PcieRpEnable[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
register "PcieRpHotPlug[4]" = "1"
register "PcieClkSrcUsage[4]" = "4"
register "PcieClkSrcClkReq[4]" = "4"
end
device pci 1d.0 on # PCI Express Port 9
# PCI Express Root port #9 x1, Clock 3 (LAN)
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[3]" = "8"
register "PcieClkSrcClkReq[3]" = "3"
end
device pci 1d.1 on # PCI Express Port 10
# PCI Express Root port #10 x1, Clock 2 (WLAN)
register "PcieRpEnable[9]" = "1"
register "PcieRpLtrEnable[9]" = "0"
register "PcieClkSrcUsage[2]" = "9"
register "PcieClkSrcClkReq[2]" = "2"
end
device pci 1d.4 on # PCI Express Port 13
# PCI Express Root port #13 x4, Clock 5 (NVMe)
register "PcieRpEnable[12]" = "1"
register "PcieRpLtrEnable[12]" = "1"
register "PcieClkSrcUsage[5]" = "12"
register "PcieClkSrcClkReq[5]" = "5"
end
device pci 1f.3 on # Intel HDA
register "PchHdaAudioLinkDmic0" = "1"
register "PchHdaAudioLinkDmic1" = "1"
end
end
end