Kconfig: Move defaults for CBFS_SIZE
We want the question for CBFS size to be next to the rom size in the
mainboard directory, but that doesn't seem to work for how people
want to set the defaults. Instead of having the list of exceptions
to the size, just set the defaults at the end of kconfig.
- Move the defaults for chipsets not setting HAVE_INTEL_FIRMWARE into
the chipset Kconfigs (gm45, nehalem, sandybridge, x4x)
- Override the default for HAVE_INTEL_FIRMWARE on skylake.
- Move the HAVE_INTEL_FIRMWARE default setting into the firmware
Kconfig file
- Move the location of the default CBFS_SIZE=ROM_SIZE to the end of
the top level kconfig file, while leaving the question where it is.
Test=rebuild Kconfig files before and after the change, verify that
they are how they were intended to be.
Note: the Skylake boards actually changed value, because they were
picking up the 0x100000 from HAVE_INTEL_FIRMWARE instead of the
0x200000 desired. This was due to the SOC_INTEL_SKYLAKE being after
the HAVE_INTEL_FIRMWARE default. Affected boards were:
Google chell, glados, & lars and Intel kunimitsu.
Change-Id: I2963a7a7eab037955558d401f5573533674a664f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13645
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/Kconfig b/src/Kconfig
index 35acad4..7f13b62 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -376,17 +376,9 @@
source "src/mainboard/Kconfig"
+# defaults for CBFS_SIZE are set at the end of the file.
config CBFS_SIZE
hex "Size of CBFS filesystem in ROM"
- default 0x100000 if HAVE_INTEL_FIRMWARE || \
- NORTHBRIDGE_INTEL_X4X || \
- NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC || \
- NORTHBRIDGE_INTEL_IVYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE || \
- NORTHBRIDGE_INTEL_SANDYBRIDGE || \
- NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \
- SOC_INTEL_BROADWELL
- default 0x200000 if SOC_INTEL_SKYLAKE
- default ROM_SIZE
help
This is the part of the ROM actually managed by CBFS, located at the
end of the ROM (passed through cbfstool -o) on x86 and at at the start
@@ -1157,3 +1149,11 @@
Internal option that sets the maximum number of bootblock executions allowed
with the normal image enabled before assuming the normal image is defective
and switching to the fallback image.
+
+config CBFS_SIZE
+ hex
+ default ROM_SIZE
+ help
+ This is the part of the ROM actually managed by CBFS. Set it to be
+ equal to the full rom size if that hasn't been overridden by the
+ chipset or mainboard.
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 98ce644..6ee6558 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -27,6 +27,10 @@
select INTEL_EDID
select INTEL_GMA_ACPI
+config CBFS_SIZE
+ hex
+ default 0x100000
+
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/intel/gm45/bootblock.c"
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index 028921c..3658bd8 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -25,6 +25,10 @@
if NORTHBRIDGE_INTEL_NEHALEM
+config CBFS_SIZE
+ hex
+ default 0x100000
+
config VGA_BIOS_ID
string
default "8086,0046"
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 347e3fa..9d4d089 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -45,6 +45,10 @@
if NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE_MRC || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_SANDYBRIDGE
+config CBFS_SIZE
+ hex
+ default 0x100000
+
config VGA_BIOS_ID
string
default "8086,0106"
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index f643bb2..4ee90a4 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -28,6 +28,10 @@
select INTEL_GMA_ACPI
select EARLY_CBMEM_INIT
+config CBFS_SIZE
+ hex
+ default 0x100000
+
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/intel/x4x/bootblock.c"
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 0ebdaa4..c0ce9ad 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -64,6 +64,10 @@
string
default "soc/intel/skylake/bootblock/pch.c"
+config CBFS_SIZE
+ hex
+ default 0x200000
+
config CPU_ADDR_BITS
int
default 36
diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig
index 62b9a31..c36b235 100644
--- a/src/southbridge/intel/common/firmware/Kconfig
+++ b/src/southbridge/intel/common/firmware/Kconfig
@@ -146,4 +146,10 @@
If unsure, say N.
+config CBFS_SIZE
+ hex
+ default 0x100000
+ help
+ Reduce CBFS size to give room to the IFD blobs.
+
endif #INTEL_FIRMWARE