| config SOC_NVIDIA_TEGRA132 |
| bool |
| default n |
| select ARCH_BOOTBLOCK_ARMV4 |
| select ARCH_VERSTAGE_ARMV4 |
| select ARCH_ROMSTAGE_ARMV4 |
| select ARCH_RAMSTAGE_ARMV8_64 |
| select BOOTBLOCK_CONSOLE |
| select GIC |
| select HAVE_MONOTONIC_TIMER |
| select GENERIC_UDELAY |
| select HAVE_HARD_RESET |
| select HAVE_UART_SPECIAL |
| select HAVE_UART_MEMORY_MAPPED |
| select EARLY_CONSOLE |
| select ARM_BOOTBLOCK_CUSTOM |
| select DYNAMIC_CBMEM |
| select SMP |
| select ARCH_USE_SECURE_MONITOR |
| |
| if SOC_NVIDIA_TEGRA132 |
| |
| config MAINBOARD_DO_DSI_INIT |
| bool "Use dsi graphics interface" |
| depends on MAINBOARD_DO_NATIVE_VGA_INIT |
| default n |
| help |
| Initialize dsi display |
| |
| config MAINBOARD_DO_SOR_INIT |
| bool "Use dp graphics interface" |
| depends on MAINBOARD_DO_NATIVE_VGA_INIT |
| default n |
| help |
| Initialize dp display |
| |
| config BOOTBLOCK_CPU_INIT |
| string |
| default "soc/nvidia/tegra132/bootblock.c" |
| help |
| CPU/SoC-specific bootblock code. This is useful if the |
| bootblock must load microcode or copy data from ROM before |
| searching for the bootblock. |
| |
| config MAX_CPUS |
| int |
| default 2 |
| |
| config MTS_DIRECTORY |
| string "Directory where MTS microcode files are located" |
| default "3rdparty/cpu/nvidia/tegra132/current/prod" |
| help |
| Path to directory where MTS microcode files are located. |
| |
| config TRUSTZONE_CARVEOUT_SIZE_MB |
| hex "Size of Trust Zone region" |
| default 0x4 |
| help |
| Size of Trust Zone area in MiB to reserve in memory map. |
| |
| config BOOTROM_SDRAM_INIT |
| bool "SoC BootROM does SDRAM init with full BCT" |
| default n |
| help |
| Use during Ryu LPDDR3 bringup |
| |
| # Default to 700MHz. This value is based on nv bootloader setting. |
| config PLLX_KHZ |
| int |
| default 700000 |
| endif |