| chip soc/intel/cannonlake |
| register "common_soc_config.chipset_lockdown" = CHIPSET_LOCKDOWN_COREBOOT |
| |
| device cpu_cluster 0 on |
| device lapic 0 on end |
| end |
| |
| device domain 0 on |
| device pci 00.0 on end # Host Bridge |
| device pci 01.0 on # PEG x8 / Slot 2 |
| smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT2" "SlotDataBusWidth8X" |
| end |
| device pci 01.1 on # PEG x4 or x8 / Slot 6 |
| smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT6" "SlotDataBusWidth4X" |
| end |
| device pci 01.2 on # PEG x4 or disabled / Slot 4 |
| smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT4" "SlotDataBusWidth4X" |
| end |
| device pci 04.0 on end # SA Thermal device |
| device pci 08.0 on end # Gaussian Mixture |
| device pci 12.0 on end # Thermal Subsystem |
| device pci 14.0 on end # USB xHCI |
| device pci 14.1 off end # USB xDCI (OTG) |
| device pci 14.2 on end # RAM controller |
| device pci 14.5 off end # SDCard |
| |
| device pci 16.0 on end # Management Engine Interface 1 |
| device pci 16.1 on end # Management Engine Interface 2 |
| device pci 16.4 off end # Management Engine Interface 3 |
| device pci 17.0 on end # SATA |
| device pci 1d.6 on # PCIe root port 15 |
| device pci 00.0 on # Aspeed PCI Bridge |
| device pci 00.0 on end # Aspeed 2500 VGA |
| end |
| register "PcieRpSlotImplemented[14]" = "1" |
| end |
| device pci 1f.0 on # LPC Interface |
| chip drivers/pc80/tpm |
| device pnp 0c31.0 on end |
| end |
| # AST2500, but not enabled to decode LPC cycles |
| end |
| device pci 1f.3 on end |
| device pci 1f.4 on end # SMBus |
| device pci 1f.5 on end # PCH SPI |
| end |
| |
| end |