soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c
Commit 2c26108208e4aa48de21be576ab6cad9286d7934 moved this function to
pmutil.c for Tiger Lake. Do this to all other platforms for consistency.
For Skylake, __SIMPLE_DEVICE__ preprocessor guards are no longer needed.
With this change, pmc.c is only needed in ramstage. Adjust Makefile.inc
accordingly, and drop ENV_RAMSTAGE guards from Skylake.
Change-Id: I424eb359c898f155659d085b888410b6bb58b9ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 64889e5..a816713 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -42,7 +42,6 @@
romstage-y += spi.c
smm-y += mmap_boot.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += spi.c
diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c
index 2eb8f11..4cc7670 100644
--- a/src/soc/intel/apollolake/pmc.c
+++ b/src/soc/intel/apollolake/pmc.c
@@ -77,19 +77,6 @@
write32((void *)gen_pmcon3, reg);
}
-void pmc_soc_set_afterg3_en(const bool on)
-{
- void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1);
- uint32_t reg32;
-
- reg32 = read32(gen_pmcon1);
- if (on)
- reg32 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg32 |= SLEEP_AFTER_POWER_FAIL;
- write32(gen_pmcon1, reg32);
-}
-
void pmc_soc_init(struct device *dev)
{
const struct soc_intel_apollolake_config *cfg = config_of(dev);
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index 8f222dd..891c876 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -224,3 +224,16 @@
{
return (uint16_t) ACPI_BASE_ADDRESS;
}
+
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ void *const gen_pmcon1 = (void *)(soc_read_pmc_base() + GEN_PMCON1);
+ uint32_t reg32;
+
+ reg32 = read32(gen_pmcon1);
+ if (on)
+ reg32 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg32 |= SLEEP_AFTER_POWER_FAIL;
+ write32(gen_pmcon1, reg32);
+}
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 99a6bac..7c33835 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -56,7 +56,6 @@
smm-y += elog.c
smm-y += p2sb.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index e1b56e9..d6c30a8 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -12,23 +12,6 @@
#include "chip.h"
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
- uint8_t reg8;
- uint8_t *const pmcbase = pmc_mmio_regs();
-
- reg8 = read8(pmcbase + GEN_PMCON_A);
- if (on)
- reg8 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg8 |= SLEEP_AFTER_POWER_FAIL;
- write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
static void pm1_enable_pwrbtn_smi(void *unused)
{
/*
diff --git a/src/soc/intel/cannonlake/pmutil.c b/src/soc/intel/cannonlake/pmutil.c
index d6ecd8b..a79d262 100644
--- a/src/soc/intel/cannonlake/pmutil.c
+++ b/src/soc/intel/cannonlake/pmutil.c
@@ -259,3 +259,20 @@
{
return (uint16_t) ACPI_BASE_ADDRESS;
}
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ uint8_t reg8;
+ uint8_t *const pmcbase = pmc_mmio_regs();
+
+ reg8 = read8(pmcbase + GEN_PMCON_A);
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
+ write8(pmcbase + GEN_PMCON_A, reg8);
+}
diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc
index 592d4a2..fb6a5c1 100644
--- a/src/soc/intel/elkhartlake/Makefile.inc
+++ b/src/soc/intel/elkhartlake/Makefile.inc
@@ -45,7 +45,6 @@
smm-y += gpio.c
smm-y += p2sb.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/elkhartlake/pmc.c b/src/soc/intel/elkhartlake/pmc.c
index 57f26d9..45a368c 100644
--- a/src/soc/intel/elkhartlake/pmc.c
+++ b/src/soc/intel/elkhartlake/pmc.c
@@ -11,23 +11,6 @@
#include <soc/pm.h>
#include <soc/soc_chip.h>
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
- uint8_t reg8;
- uint8_t *const pmcbase = pmc_mmio_regs();
-
- reg8 = read8(pmcbase + GEN_PMCON_A);
- if (on)
- reg8 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg8 |= SLEEP_AFTER_POWER_FAIL;
- write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;
diff --git a/src/soc/intel/elkhartlake/pmutil.c b/src/soc/intel/elkhartlake/pmutil.c
index e54da43..ca82e16 100644
--- a/src/soc/intel/elkhartlake/pmutil.c
+++ b/src/soc/intel/elkhartlake/pmutil.c
@@ -259,3 +259,20 @@
{
return (uint16_t) ACPI_BASE_ADDRESS;
}
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ uint8_t reg8;
+ uint8_t *const pmcbase = pmc_mmio_regs();
+
+ reg8 = read8(pmcbase + GEN_PMCON_A);
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
+ write8(pmcbase + GEN_PMCON_A, reg8);
+}
diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc
index a48dbbb..68308cf 100644
--- a/src/soc/intel/icelake/Makefile.inc
+++ b/src/soc/intel/icelake/Makefile.inc
@@ -44,7 +44,6 @@
smm-y += gpio.c
smm-y += p2sb.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c
index 5bd4438..ee40fee 100644
--- a/src/soc/intel/icelake/pmc.c
+++ b/src/soc/intel/icelake/pmc.c
@@ -11,23 +11,6 @@
#include <soc/pm.h>
#include <soc/soc_chip.h>
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
- uint8_t reg8;
- uint8_t *const pmcbase = pmc_mmio_regs();
-
- reg8 = read8(pmcbase + GEN_PMCON_A);
- if (on)
- reg8 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg8 |= SLEEP_AFTER_POWER_FAIL;
- write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;
diff --git a/src/soc/intel/icelake/pmutil.c b/src/soc/intel/icelake/pmutil.c
index 894894f..108b919 100644
--- a/src/soc/intel/icelake/pmutil.c
+++ b/src/soc/intel/icelake/pmutil.c
@@ -259,3 +259,20 @@
{
return (uint16_t) ACPI_BASE_ADDRESS;
}
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ uint8_t reg8;
+ uint8_t *const pmcbase = pmc_mmio_regs();
+
+ reg8 = read8(pmcbase + GEN_PMCON_A);
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
+ write8(pmcbase + GEN_PMCON_A, reg8);
+}
diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc
index c4b5fed..8a03965 100644
--- a/src/soc/intel/jasperlake/Makefile.inc
+++ b/src/soc/intel/jasperlake/Makefile.inc
@@ -47,7 +47,6 @@
smm-y += gpio.c
smm-y += p2sb.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c
index ed6a31d..c0507d6 100644
--- a/src/soc/intel/jasperlake/pmc.c
+++ b/src/soc/intel/jasperlake/pmc.c
@@ -11,23 +11,6 @@
#include <soc/pm.h>
#include <soc/soc_chip.h>
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
- uint8_t reg8;
- uint8_t *const pmcbase = pmc_mmio_regs();
-
- reg8 = read8(pmcbase + GEN_PMCON_A);
- if (on)
- reg8 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg8 |= SLEEP_AFTER_POWER_FAIL;
- write8(pmcbase + GEN_PMCON_A, reg8);
-}
-
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;
diff --git a/src/soc/intel/jasperlake/pmutil.c b/src/soc/intel/jasperlake/pmutil.c
index 3b93d32..4d9a123 100644
--- a/src/soc/intel/jasperlake/pmutil.c
+++ b/src/soc/intel/jasperlake/pmutil.c
@@ -259,3 +259,20 @@
{
return (uint16_t) ACPI_BASE_ADDRESS;
}
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ uint8_t reg8;
+ uint8_t *const pmcbase = pmc_mmio_regs();
+
+ reg8 = read8(pmcbase + GEN_PMCON_A);
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
+ write8(pmcbase + GEN_PMCON_A, reg8);
+}
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 1a4f740..8dbadcc 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -32,7 +32,6 @@
romstage-y += gspi.c
romstage-y += i2c.c
romstage-y += me.c
-romstage-y += pmc.c
romstage-y += pmutil.c
romstage-y += reset.c
romstage-y += spi.c
@@ -66,7 +65,6 @@
smm-y += elog.c
smm-y += gpio.c
smm-y += p2sb.c
-smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index c70710f..e797b8f 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -14,28 +14,6 @@
#include "chip.h"
-/*
- * Set which power state system will be after reapplying
- * the power (from G3 State)
- */
-void pmc_soc_set_afterg3_en(const bool on)
-{
- uint8_t reg8;
-#if defined(__SIMPLE_DEVICE__)
- const pci_devfn_t dev = PCH_DEV_PMC;
-#else
- const struct device *const dev = PCH_DEV_PMC;
-#endif
-
- reg8 = pci_read_config8(dev, GEN_PMCON_B);
- if (on)
- reg8 &= ~SLEEP_AFTER_POWER_FAIL;
- else
- reg8 |= SLEEP_AFTER_POWER_FAIL;
- pci_write_config8(dev, GEN_PMCON_B, reg8);
-}
-
-#if ENV_RAMSTAGE
/* Fill up PMC resource structure */
int pmc_soc_get_resources(struct pmc_resource_config *cfg)
{
@@ -166,5 +144,3 @@
BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_EXIT, pm1_handle_wake_pin, NULL);
-
-#endif
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 35862c2..fe26ebf 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -248,3 +248,20 @@
{
return ACPI_BASE_ADDRESS;
}
+
+/*
+ * Set which power state system will be after reapplying
+ * the power (from G3 State)
+ */
+void pmc_soc_set_afterg3_en(const bool on)
+{
+ uint8_t reg8;
+ const pci_devfn_t dev = PCH_DEV_PMC;
+
+ reg8 = pci_read_config8(dev, GEN_PMCON_B);
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
+ pci_write_config8(dev, GEN_PMCON_B, reg8);
+}