soc/intel: Use of common reset code block
This patch removes all redundant reset code block from each SoC
and make use of common reset code block(fsp_reset.c) based on
SOC_INTEL_COMMON_FSP_RESET.
Respective SoC Kconfig to choose correct FSP global reset type as
per FSP integration guide.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 0c8eae2..3917fea 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -38,6 +38,7 @@
# Misc options
select CACHE_MRC_SETTINGS
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_5
select GENERIC_GPIO_LIB
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
@@ -91,6 +92,7 @@
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_CSE
select SOC_INTEL_COMMON_BLOCK_SMBUS
+ select SOC_INTEL_COMMON_FSP_RESET
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select UDELAY_TSC
select TSC_MONOTONIC_TIMER