soc/intel: Use of common reset code block
This patch removes all redundant reset code block from each SoC
and make use of common reset code block(fsp_reset.c) based on
SOC_INTEL_COMMON_FSP_RESET.
Respective SoC Kconfig to choose correct FSP global reset type as
per FSP integration guide.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 1a3f072..ade2fc1 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -16,6 +16,7 @@
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -49,6 +50,7 @@
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/alderlake/reset.c b/src/soc/intel/alderlake/reset.c
index 1f7ea3c..bc5815a 100644
--- a/src/soc/intel/alderlake/reset.c
+++ b/src/soc/intel/alderlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 0c8eae2..3917fea 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -38,6 +38,7 @@
# Misc options
select CACHE_MRC_SETTINGS
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_5
select GENERIC_GPIO_LIB
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
@@ -91,6 +92,7 @@
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_CSE
select SOC_INTEL_COMMON_BLOCK_SMBUS
+ select SOC_INTEL_COMMON_FSP_RESET
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select UDELAY_TSC
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c
index 8641b63..186a546 100644
--- a/src/soc/intel/apollolake/reset.c
+++ b/src/soc/intel/apollolake/reset.c
@@ -3,7 +3,6 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <delay.h>
-#include <fsp/util.h>
#include <intelblocks/pmclib.h>
#include <soc/heci.h>
#include <soc/intel/common/reset.h>
@@ -47,16 +46,3 @@
}
printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 5149274..2b862e7 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -82,6 +82,7 @@
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZMA
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
@@ -120,6 +121,7 @@
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
+ select SOC_INTEL_COMMON_FSP_RESET
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 1f7ea3c..bc5815a 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 05077ad..f833178 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -16,6 +16,7 @@
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -50,6 +51,7 @@
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/elkhartlake/reset.c b/src/soc/intel/elkhartlake/reset.c
index fe3d769..bc5815a 100644
--- a/src/soc/intel/elkhartlake/reset.c
+++ b/src/soc/intel/elkhartlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
-#include <fsp/util.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 464a11b..23b9ba2 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -16,6 +16,7 @@
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_INTEL_FSP_REPO
@@ -51,6 +52,7 @@
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
select SOC_INTEL_COMMON_BLOCK_THERMAL
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/icelake/reset.c b/src/soc/intel/icelake/reset.c
index 1f7ea3c..bc5815a 100644
--- a/src/soc/intel/icelake/reset.c
+++ b/src/soc/intel/icelake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 4ea0837..00153fa 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -17,6 +17,7 @@
select COS_MAPPED_TO_MSB
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -50,6 +51,7 @@
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/jasperlake/reset.c b/src/soc/intel/jasperlake/reset.c
index 1f7ea3c..bc5815a 100644
--- a/src/soc/intel/jasperlake/reset.c
+++ b/src/soc/intel/jasperlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 2478113..20b302d 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -26,6 +26,7 @@
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_FSP_LOGO_SUPPORT
@@ -63,6 +64,7 @@
select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/skylake/reset.c b/src/soc/intel/skylake/reset.c
index 1076ad2..8bf9db5 100644
--- a/src/soc/intel/skylake/reset.c
+++ b/src/soc/intel/skylake/reset.c
@@ -1,8 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
-#include <fsp/util.h>
#include <intelblocks/pmclib.h>
#include <soc/intel/common/reset.h>
#include <soc/me.h>
@@ -30,17 +28,3 @@
do_force_global_reset();
}
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 7959526..492d6fd4 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -17,6 +17,7 @@
select DRIVERS_USB_ACPI
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
+ select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@@ -53,6 +54,7 @@
select SOC_INTEL_COMMON_BLOCK_USB4
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
+ select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/tigerlake/reset.c b/src/soc/intel/tigerlake/reset.c
index 1f7ea3c..bc5815a 100644
--- a/src/soc/intel/tigerlake/reset.c
+++ b/src/soc/intel/tigerlake/reset.c
@@ -1,12 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cf9_reset.h>
-#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
-#include <fsp/util.h>
#include <soc/intel/common/reset.h>
-#include <soc/pci_devs.h>
void do_global_reset(void)
{
@@ -18,17 +15,3 @@
pmc_global_reset_enable(1);
do_full_reset();
}
-
-void chipset_handle_reset(uint32_t status)
-{
- switch (status) {
- case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
- printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
- global_reset();
- break;
- default:
- printk(BIOS_ERR, "unhandled reset type %x\n", status);
- die("unknown reset type");
- break;
- }
-}