| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright 2014 Rockchip Inc. |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| config SOC_ROCKCHIP_RK3288 |
| bool |
| default n |
| select ARCH_BOOTBLOCK_ARMV7 |
| select ARCH_VERSTAGE_ARMV7 |
| select ARCH_ROMSTAGE_ARMV7 |
| select ARCH_RAMSTAGE_ARMV7 |
| select HAS_PRECBMEM_TIMESTAMP_REGION |
| select HAVE_MONOTONIC_TIMER |
| select GENERIC_UDELAY |
| select HAVE_UART_SPECIAL |
| select BOOTBLOCK_CONSOLE |
| select UNCOMPRESSED_RAMSTAGE |
| select GENERIC_GPIO_LIB |
| select RTC |
| |
| if SOC_ROCKCHIP_RK3288 |
| |
| config CHROMEOS |
| select VBOOT_STARTS_IN_BOOTBLOCK |
| select SEPARATE_VERSTAGE |
| select RETURN_FROM_VERSTAGE |
| |
| config PMIC_BUS |
| int |
| default -1 |
| |
| endif |