ACPI: Separate device_nvs_t
Remove typedef device_nvs_t and move struct device_nvs
outside of global_nvs. Also remove padding and the reserve
for chromeos_acpi_t.
Change-Id: I878746b1f0f9152a27dc58e373d58115e2dff22c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/broadwell/pch/serialio.c b/src/soc/intel/broadwell/pch/serialio.c
index d32a27d..28f34b7 100644
--- a/src/soc/intel/broadwell/pch/serialio.c
+++ b/src/soc/intel/broadwell/pch/serialio.c
@@ -8,7 +8,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/iobp.h>
-#include <soc/nvs.h>
+#include <soc/device_nvs.h>
#include <soc/pci_devs.h>
#include <soc/pch.h>
#include <soc/ramstage.h>
@@ -233,20 +233,15 @@
}
if (config->sio_acpi_mode) {
- struct global_nvs *gnvs;
-
- /* Find ACPI NVS to update BARs */
- gnvs = acpi_get_gnvs();
- if (!gnvs)
- return;
+ struct device_nvs *dev_nvs = acpi_get_device_nvs();
/* Save BAR0 and BAR1 to ACPI NVS */
- gnvs->dev.bar0[sio_index] = (u32)bar0->base;
- gnvs->dev.bar1[sio_index] = (u32)bar1->base;
+ dev_nvs->bar0[sio_index] = (u32)bar0->base;
+ dev_nvs->bar1[sio_index] = (u32)bar1->base;
/* Do not enable UART if it is used as debug port */
if (!serialio_uart_is_debug(dev))
- gnvs->dev.enable[sio_index] = 1;
+ dev_nvs->enable[sio_index] = 1;
/* Put device in D3hot state via BAR1 */
if (dev->path.pci.devfn != PCH_DEVFN_SDMA)