| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2007-2009 coresystems GmbH |
| ## |
| ## This program is free software; you can redistribute it and/or |
| ## modify it under the terms of the GNU General Public License as |
| ## published by the Free Software Foundation; version 2 of |
| ## the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| ## You should have received a copy of the GNU General Public License |
| ## along with this program; if not, write to the Free Software |
| ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| ## MA 02110-1301 USA |
| ## |
| |
| ## CONFIG_XIP_ROM_SIZE must be a power of 2. |
| default CONFIG_XIP_ROM_SIZE = 64 * 1024 |
| include /config/nofailovercalculation.lb |
| |
| ## |
| ## Set all of the defaults for an x86 architecture |
| ## |
| |
| arch i386 end |
| |
| ## |
| ## Build the objects we have code for in this directory. |
| ## |
| |
| driver mainboard.o |
| |
| if CONFIG_HAVE_MP_TABLE |
| object mptable.o |
| end |
| |
| if CONFIG_HAVE_PIRQ_TABLE |
| object irq_tables.o |
| end |
| |
| if CONFIG_HAVE_ACPI_TABLES |
| object fadt.o |
| object acpi_tables.o |
| makerule dsdt.c |
| depends "$(CONFIG_MAINBOARD)/dsdt.dsl" |
| action "iasl -p dsdt -tc $(CONFIG_MAINBOARD)/dsdt.dsl" |
| action "mv dsdt.hex dsdt.c" |
| end |
| object ./dsdt.o |
| end |
| |
| ## |
| ## Romcc output |
| ## |
| makerule ./auto.inc |
| depends "$(CONFIG_MAINBOARD)/auto.c option_table.h" |
| action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/auto.c -o $@" |
| action "perl -e 's/\.rodata/.rom.data/g' -pi $@" |
| action "perl -e 's/\.text/.section .rom.text/g' -pi $@" |
| end |
| |
| ## |
| ## Build our 16 bit and 32 bit coreboot entry code |
| ## |
| mainboardinit cpu/x86/16bit/entry16.inc |
| mainboardinit cpu/x86/32bit/entry32.inc |
| ldscript /cpu/x86/16bit/entry16.lds |
| ldscript /cpu/x86/32bit/entry32.lds |
| |
| ## |
| ## Build our reset vector (This is where coreboot is entered) |
| ## |
| if CONFIG_USE_FALLBACK_IMAGE |
| mainboardinit cpu/x86/16bit/reset16.inc |
| ldscript /cpu/x86/16bit/reset16.lds |
| else |
| mainboardinit cpu/x86/32bit/reset32.inc |
| ldscript /cpu/x86/32bit/reset32.lds |
| end |
| |
| mainboardinit cpu/via/car/cache_as_ram.inc |
| |
| ## |
| ## Include an id string (For safe flashing) |
| ## |
| mainboardinit arch/i386/lib/id.inc |
| ldscript /arch/i386/lib/id.lds |
| |
| ### |
| ### O.k. We aren't just an intermediary anymore! |
| ### |
| |
| ## |
| ## Setup RAM |
| ## |
| mainboardinit cpu/x86/fpu/enable_fpu.inc |
| mainboardinit ./auto.inc |
| |
| ## |
| ## Include the secondary Configuration files |
| ## |
| dir /pc80 |
| config chip.h |
| |
| chip northbridge/via/cx700 |
| device apic_cluster 0 on |
| chip cpu/via/model_c7 |
| device apic 0 on end |
| end |
| end |
| device pci_domain 0 on |
| device pci 0.0 on end # AGP Bridge |
| device pci 0.1 on end # Error Reporting |
| device pci 0.2 on end # Host Bus Control |
| device pci 0.3 on end # Memory Controller |
| device pci 0.4 on end # Power Management |
| device pci 0.7 on end # V-Link Controller |
| device pci 1.0 on # PCI Bridge |
| chip drivers/pci/onboard |
| device pci 0.0 on end |
| #register "rom_address" = "0xfffc0000" #256k image |
| register "rom_address" = "0xfff80000" #512k image |
| #register "rom_address" = "0xfff00000" #1024k image |
| end # Onboard Video |
| end # PCI Bridge |
| device pci f.0 on end # IDE/SATA |
| #device pci f.1 on end # IDE |
| device pci 10.0 on end # USB 1.1 |
| device pci 10.1 on end # USB 1.1 |
| device pci 10.2 on end # USB 1.1 |
| device pci 10.4 on end # USB 2.0 |
| device pci 11.0 on # Southbridge LPC |
| chip superio/via/vt1211 |
| device pnp 2e.0 on # Floppy |
| io 0x60 = 0x3f0 |
| irq 0x70 = 6 |
| drq 0x74 = 2 |
| end |
| device pnp 2e.1 on # Parallel Port |
| io 0x60 = 0x378 |
| irq 0x70 = 7 |
| drq 0x74 = 3 |
| end |
| device pnp 2e.2 on # COM1 |
| io 0x60 = 0x3f8 |
| irq 0x70 = 4 |
| end |
| device pnp 2e.3 on # COM2 |
| io 0x60 = 0x2f8 |
| irq 0x70 = 3 |
| end |
| device pnp 2e.b on # HWM |
| io 0x60 = 0xec00 |
| end |
| end # superio |
| end # pci 11.0 |
| # 1-4 non existant |
| #device pci 11.5 on end # AC97 Audio |
| #device pci 11.6 off end # AC97 Modem |
| #device pci 12.0 on end # Ethernet |
| end # pci domain 0 |
| end # cx700 |
| |