sb/intel/lynxpoint: Refactor `usb_xhci_port_count_usb3`
Change the function parameters to avoid preprocessor usage.
Change-Id: Iec43e057ed2a629e702e0f484ff7f19fe8a0311b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51236
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index d4611a7..ce851a3 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -28,18 +28,19 @@
return (u8 *)(mem_base & ~0xf);
}
-#ifdef __SIMPLE_DEVICE__
-static int usb_xhci_port_count_usb3(pci_devfn_t dev)
-#else
-static int usb_xhci_port_count_usb3(struct device *dev)
-#endif
+static int usb_xhci_port_count_usb3(u8 *mem_base)
{
+ if (!mem_base) {
+ /* Do not proceed if BAR is invalid */
+ return 0;
+ }
+
if (pch_is_lp()) {
/* LynxPoint-LP has 4 SS ports */
return 4;
}
- /* LynxPoint-H can have 0, 2, 4, or 6 SS ports */
- u8 *mem_base = usb_xhci_mem_base(dev);
+
+ /* LynxPoint-H can have 0, 2, 4, or 6 SS ports */
u32 fus = read32(mem_base + XHCI_USB3FUS);
fus >>= XHCI_USB3FUS_SS_SHIFT;
fus &= XHCI_USB3FUS_SS_MASK;
@@ -87,10 +88,10 @@
{
u32 status, port_disabled;
int timeout, port;
- int port_count = usb_xhci_port_count_usb3(dev);
u8 *mem_base = usb_xhci_mem_base(dev);
+ int port_count = usb_xhci_port_count_usb3(mem_base);
- if (!mem_base || !port_count)
+ if (!port_count)
return;
/* Get mask of disabled ports */