commonlib/console/post_code.h: Change post code prefix to POSTCODE

The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.

The files was changed by running the following bash script from the
top level directory.

  sed -i'' '30,${s/#define POST/#define POSTCODE/g;}' \
  src/commonlib/include/commonlib/console/post_codes.h;
  myArray=`grep -e "^#define POSTCODE_" \
  src/commonlib/include/commonlib/console/post_codes.h | \
  grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`;

  for str in ${myArray[@]}; do
    splitstr=`echo $str | cut -d '_' -f2-`
    grep -r POST_$splitstr src | \
    cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
    grep -r "POST_$splitstr" util/cbfstool | \
    cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
  done

Change-Id: I25db79fa15f032c08678f66d86c10c928b7de9b8
Signed-off-by: lilacious <yuchenhe126@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index 6a19792..8afb6ff 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -18,7 +18,7 @@
 
 Method (_PTS, 1)
 {
-	DBG0 = POST_OS_ENTER_PTS
+	DBG0 = POSTCODE_OS_ENTER_PTS
 
 	If (CondRefOf (\_SB.PCI0.LPCB.EC0.PTS))
 	{
@@ -42,7 +42,7 @@
 
 Method (_WAK, 1)
 {
-	DBG0 = POST_OS_ENTER_WAKE
+	DBG0 = POSTCODE_OS_ENTER_WAKE
 
 	If (CondRefOf (\_SB.PCI0.LPCB.EC0.WAK))
 	{
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index f2ae72c..5f6b6de 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -302,7 +302,7 @@
 	/* Never reached */
 
 .halt_forever:
-	post_code(POST_DEAD_CODE)
+	post_code(POSTCODE_DEAD_CODE)
 	hlt
 	jmp	.halt_forever
 
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index 0126a12..7532c7d 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -20,7 +20,7 @@
 
 .global	cache_as_ram
 cache_as_ram:
-	post_code(POST_BOOTBLOCK_CAR)
+	post_code(POSTCODE_BOOTBLOCK_CAR)
 
 	movl	$(CONFIG_FSP_T_LOCATION), %ebx
 	add	$0x94, %ebx
@@ -99,7 +99,7 @@
 	/* Never reached */
 
 .halt_forever:
-	post_code(POST_DEAD_CODE)
+	post_code(POSTCODE_DEAD_CODE)
 	hlt
 	jmp	.halt_forever
 
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 81a5d34..f163e22 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -117,7 +117,7 @@
 
 	memory_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_2);
 	if (!memory_base)
-		die_with_post_code(POST_HW_INIT_FAILURE,
+		die_with_post_code(POSTCODE_HW_INIT_FAILURE,
 				   "Graphic memory bar2 is not programmed!");
 
 	memory_base += CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET;
@@ -140,7 +140,7 @@
 	if (!gtt_base) {
 		gtt_base = graphics_get_bar(dev, PCI_BASE_ADDRESS_0);
 		if (!gtt_base)
-			die_with_post_code(POST_HW_INIT_FAILURE,
+			die_with_post_code(POSTCODE_HW_INIT_FAILURE,
 					   "GTTMMADR is not programmed!");
 	}
 	return gtt_base;
diff --git a/src/soc/intel/common/block/p2sb/p2sblib.c b/src/soc/intel/common/block/p2sb/p2sblib.c
index 537f388..70fbcaa 100644
--- a/src/soc/intel/common/block/p2sb/p2sblib.c
+++ b/src/soc/intel/common/block/p2sb/p2sblib.c
@@ -50,7 +50,7 @@
 	p2sb_dev_set_hide_bit(dev, 0);
 
 	if (p2sb_dev_is_hidden(dev))
-		die_with_post_code(POST_HW_INIT_FAILURE,
+		die_with_post_code(POSTCODE_HW_INIT_FAILURE,
 				"Unable to unhide the P2SB device!\n");
 }
 
@@ -59,7 +59,7 @@
 	p2sb_dev_set_hide_bit(dev, 1);
 
 	if (!p2sb_dev_is_hidden(dev))
-		die_with_post_code(POST_HW_INIT_FAILURE,
+		die_with_post_code(POSTCODE_HW_INIT_FAILURE,
 				"Unable to hide the P2SB device!\n");
 }
 
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index 37d8579..2805011 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -62,7 +62,7 @@
 	struct pmc_resource_config *config = &pmc_cfg;
 
 	if (pmc_soc_get_resources(config) < 0)
-		die_with_post_code(POST_HW_INIT_FAILURE,
+		die_with_post_code(POSTCODE_HW_INIT_FAILURE,
 				   "Unable to get PMC controller resource information!");
 
 	/* Get the normal PCI resources of this device. */