| # |
| # This file is part of the coreboot project. |
| # |
| # Copyright (C) 2012 Advanced Micro Devices, Inc. |
| # |
| # This program is free software; you can redistribute it and/or modify |
| # it under the terms of the GNU General Public License as published by |
| # the Free Software Foundation; version 2 of the License. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with this program; if not, write to the Free Software |
| # Foundation, Inc. |
| # |
| |
| config CPU_AMD_PI_00730F01 |
| bool |
| select PCI_IO_CFG_EXT |
| select X86_AMD_FIXED_MTRRS |
| |
| if CPU_AMD_PI_00730F01 |
| |
| config CPU_ADDR_BITS |
| int |
| default 40 |
| |
| config CBB |
| hex |
| default 0x0 |
| |
| config CDB |
| hex |
| default 0x18 |
| |
| config XIP_ROM_SIZE |
| hex |
| default 0x100000 |
| |
| config HIGH_SCRATCH_MEMORY_SIZE |
| hex |
| # Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000) |
| default 0xA1000 |
| |
| endif |