soc/intel/braswell: Put SERIRQ in quiet mode
Cherry-pick from Chromium commit 1568761.
Original-Change-Id: If459c3cab8fb7ca13d8bff3173a94855ec2e2810
Original-Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Kevin K Wong <kevin.k.wong@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@google.com>
Original-Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Change-Id: Ibb2e6d316adcfcc0d56d242501aac9c4c0bbdf62
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 0e2d5e2..e033123 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -38,6 +38,18 @@
#include <soc/spi.h>
#include <spi-generic.h>
#include <stdint.h>
+#include <reg_script.h>
+
+static const struct reg_script ops[] = {
+ REG_MMIO_RMW32(ILB_BASE_ADDRESS + SCNT,
+ ~SCNT_MODE, 0), /* put LPC SERIRQ in Quiet Mode */
+ REG_SCRIPT_END
+};
+
+static void enable_serirq_quiet_mode(void)
+{
+ reg_script_run(ops);
+}
static inline void
add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size)
@@ -503,6 +515,7 @@
write32(spi + LVSCC, cfg.lvscc | VCL);
}
spi_init();
+ enable_serirq_quiet_mode();
printk(BIOS_DEBUG, "Finalizing SMM.\n");
outb(APM_CNT_FINALIZE, APM_CNT);