| chip soc/intel/apollolake |
| |
| register "pcie_rp_clkreq_pin[0]" = "2" # PCIe slot 2 |
| register "pcie_rp_clkreq_pin[1]" = "3" # Wifi+BT M2 slot |
| register "pcie_rp_clkreq_pin[2]" = "0" # PCIe slot 1 |
| register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" |
| register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" |
| register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" |
| |
| device cpu_cluster 0 on |
| device lapic 0 on end |
| end |
| |
| device domain 0 on |
| device pci 00.0 on end # - Host Bridge |
| device pci 00.1 on end # - DPTF |
| device pci 00.2 on end # - NPK |
| device pci 02.0 on end # - Gen |
| device pci 03.0 on end # - Iunit |
| device pci 0d.0 on end # - P2SB |
| device pci 0d.1 on end # - PMC |
| device pci 0d.2 on end # - SPI |
| device pci 0d.3 on end # - Shared SRAM |
| device pci 0e.0 on end # - Audio |
| device pci 0f.0 on end # - CSE |
| device pci 11.0 on end # - ISH |
| device pci 12.0 on end # - SATA |
| device pci 13.0 on end # - PCIe-A 0 |
| device pci 13.2 on end # - Onboard Lan |
| device pci 13.3 on end # - PCIe-A 3 |
| device pci 14.0 on end # - PCIe-B 0 |
| device pci 14.1 on end # - Onboard M2 Slot(Wifi/BT) |
| device pci 15.0 on end # - XHCI |
| device pci 15.1 on end # - XDCI |
| device pci 16.0 on end # - I2C 0 |
| device pci 16.1 on end # - I2C 1 |
| device pci 16.2 on end # - I2C 2 |
| device pci 16.3 on end # - I2C 3 |
| device pci 17.0 on end # - I2C 4 |
| device pci 17.1 on end # - I2C 5 |
| device pci 17.2 on end # - I2C 6 |
| device pci 17.3 on end # - I2C 7 |
| device pci 18.0 on end # - UART 0 |
| device pci 18.1 on end # - UART 1 |
| device pci 18.2 on end # - UART 2 |
| device pci 18.3 on end # - UART 3 |
| device pci 19.0 on end # - SPI 0 |
| device pci 19.1 on end # - SPI 1 |
| device pci 19.2 on end # - SPI 2 |
| device pci 1a.0 on end # - PWM |
| device pci 1b.0 on end # - SDCARD |
| device pci 1c.0 on end # - eMMC |
| device pci 1e.0 on end # - SDIO |
| device pci 1f.0 on end # - LPC |
| device pci 1f.1 on end # - SMBUS |
| end |
| end |