Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
3efeeb2c8f64ce741c49745bf237528744c0b2f5
/
.
/
src
/
soc
/
intel
/
skylake
/
romstage
/
Makefile.inc
blob: 6dbe718e0bac39c60af37ec9d8fe5c5964d62621 [
file
] [
log
] [
blame
]
romstage
-
$
(
CONFIG_PLATFORM_USES_FSP1_1
)
+=
car_stage
.
S
romstage
-
y
+=
pmc
.
c
romstage
-
$
(
CONFIG_PLATFORM_USES_FSP1_1
)
+=
romstage
.
c
romstage
-
$
(
CONFIG_PLATFORM_USES_FSP2_0
)
+=
romstage_fsp20
.
c
romstage
-
y
+=
systemagent
.
c