| chip soc/intel/alderlake |
| register "power_limits_config[ADL_P_642_682_45W_CORE]" = "{ |
| .tdp_pl1_override = 45, |
| .tdp_pl2_override = 115, |
| .tdp_psyspl2 = 135, |
| }" |
| |
| # Thermal |
| register "tcc_offset" = "10" |
| |
| # GPE configuration |
| register "pmc_gpe0_dw0" = "PMC_GPP_A" |
| register "pmc_gpe0_dw1" = "PMC_GPP_R" |
| register "pmc_gpe0_dw2" = "PMC_GPD" |
| |
| device domain 0 on |
| subsystemid 0x1558 0x65f5 inherit |
| |
| device ref pcie5_0 on |
| # CPU PCIe RP#2 x8, Clock 3 (DGPU) |
| register "cpu_pcie_rp[CPU_RP(2)]" = "{ |
| .clk_src = 3, |
| .clk_req = 3, |
| .flags = PCIE_RP_LTR, |
| }" |
| end |
| device ref igpu on |
| register "ddi_portA_config" = "1" |
| register "ddi_ports_config[DDI_PORT_A]" = "DDI_ENABLE_HPD" |
| end |
| device ref pcie4_0 on |
| # CPU PCIe RP#1 x4, Clock 0 (SSD1) |
| register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| .clk_src = 0, |
| .clk_req = 0, |
| .flags = PCIE_RP_LTR, |
| }" |
| end |
| device ref pcie4_1 on |
| # CPU PCIe RP#3 x4, Clock 4 (SSD2) |
| register "cpu_pcie_rp[CPU_RP(3)]" = "{ |
| .clk_src = 4, |
| .clk_req = 4, |
| .flags = PCIE_RP_LTR, |
| }" |
| end |
| device ref tcss_xhci on |
| register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| chip drivers/usb/acpi |
| device ref tcss_root_hub on |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 TYPEC2"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| device ref tcss_usb3_port1 on end |
| end |
| end |
| end |
| end |
| device ref tcss_dma0 on |
| chip drivers/intel/usb4/retimer |
| register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" |
| use tcss_usb3_port1 as dfp[0].typec_port |
| device generic 0 on end |
| end |
| end |
| device ref xhci on |
| register "usb2_ports" = "{ |
| [0] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */ |
| [1] = USB2_PORT_MID(OC_SKIP), /* J_USB2 */ |
| [2] = USB2_PORT_MID(OC_SKIP), /* J_USB1 */ |
| [5] = USB2_PORT_MID(OC_SKIP), /* Per-KB */ |
| [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ |
| [7] = USB2_PORT_MID(OC_SKIP), /* Camera */ |
| [8] = USB2_PORT_TYPE_C(OC_SKIP), /* TYPEC2 (Thunderbolt) */ |
| [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ |
| }" |
| register "usb3_ports" = "{ |
| [0] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPEC1 (USB 3.2 Gen2) */ |
| [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB2 */ |
| [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB1 */ |
| }" |
| # ACPI |
| chip drivers/usb/acpi |
| device ref xhci_root_hub on |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 TYPEC1"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| device ref usb2_port1 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 J_USB2"" |
| register "type" = "UPC_TYPE_A" |
| device ref usb2_port2 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 J_USB1"" |
| register "type" = "UPC_TYPE_A" |
| device ref usb2_port3 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Per-KB"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| device ref usb2_port6 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Fingerprint"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| device ref usb2_port7 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Camera"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| device ref usb2_port8 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 TYPEC2"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| device ref usb2_port9 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Bluetooth"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| device ref usb2_port10 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 TYPEC1"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| device ref usb3_port1 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 J_USB2"" |
| register "type" = "UPC_TYPE_A" |
| device ref usb3_port2 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 J_USB2"" |
| register "type" = "UPC_TYPE_A" |
| device ref usb3_port3 on end |
| end |
| end |
| end |
| end |
| device ref sata off end |
| device ref pcie_rp5 on |
| # PCIe RP#5 x1, Clock 2 (WLAN) |
| register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| .clk_src = 2, |
| .clk_req = 2, |
| .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end |
| device ref pcie_rp6 on |
| # PCIe RP#6 x1, Clock 6 (CARD) |
| register "pch_pcie_rp[PCH_RP(6)]" = "{ |
| .clk_src = 6, |
| .clk_req = 6, |
| .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end |
| device ref pcie_rp8 on |
| # PCIe RP#8 x1, Clock 5 (GLAN) |
| register "pch_pcie_rp[PCH_RP(8)]" = "{ |
| .clk_src = 5, |
| .clk_req = 5, |
| .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end |
| |
| device ref pmc hidden |
| chip drivers/intel/pmc_mux |
| device generic 0 on |
| chip drivers/intel/pmc_mux/conn |
| # TYPEC2 |
| use usb2_port9 as usb2_port |
| use tcss_usb3_port1 as usb3_port |
| device generic 0 alias conn0 on end |
| end |
| end |
| end |
| end |
| device ref smbus on |
| chip drivers/i2c/tas5825m |
| register "id" = "0" |
| device i2c 4e on end # (8bit address: 0x9c) |
| end |
| end |
| end |
| end |