| chip soc/intel/meteorlake |
| |
| register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0 |
| register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 |
| register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN |
| register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera |
| register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0 |
| register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth |
| |
| register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0 |
| register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # DCI |
| |
| register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" |
| register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| |
| register "serial_io_gspi_mode" = "{ |
| [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, |
| [PchSerialIoIndexGSPI1] = PchSerialIoPci, |
| [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, |
| }" |
| |
| register "serial_io_i2c_mode" = "{ |
| [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| [PchSerialIoIndexI2C2] = PchSerialIoDisabled, |
| [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| [PchSerialIoIndexI2C4] = PchSerialIoPci, |
| [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| }" |
| |
| # Intel Common SoC Config |
| #+-------------------+---------------------------+ |
| #| Field | Value | |
| #+-------------------+---------------------------+ |
| #| I2C0 | Audio and WFC | |
| #| I2C1 | Touchscreen | |
| #| I2C3 | Touchpad | |
| #| I2C4 | cr50 TPM. Early init is | |
| #| | required to set up a BAR | |
| #| | for TPM communication | |
| #| I2C5 | UFC, SAR1, SAR2, HPS | |
| #+-------------------+---------------------------+ |
| register "common_soc_config" = "{ |
| .i2c[0] = { |
| .speed = I2C_SPEED_FAST, |
| .rise_time_ns = 650, |
| .fall_time_ns = 400, |
| .data_hold_time_ns = 50, |
| }, |
| .i2c[1] = { |
| .speed = I2C_SPEED_FAST, |
| .rise_time_ns = 650, |
| .fall_time_ns = 400, |
| .data_hold_time_ns = 50, |
| }, |
| .i2c[3] = { |
| .speed = I2C_SPEED_FAST, |
| .rise_time_ns = 650, |
| .fall_time_ns = 400, |
| .data_hold_time_ns = 50, |
| }, |
| .i2c[4] = { |
| .early_init = 1, |
| .speed = I2C_SPEED_FAST, |
| .rise_time_ns = 600, |
| .fall_time_ns = 400, |
| .data_hold_time_ns = 50, |
| }, |
| .i2c[5] = { |
| .speed = I2C_SPEED_FAST, |
| .rise_time_ns = 900, |
| .fall_time_ns = 400, |
| .data_hold_time_ns = 50, |
| }, |
| }" |
| |
| device domain 0 on |
| device ref pcie_rp9 on |
| # Enable SSD Card PCIE 9 using clk 4 |
| register "pcie_rp[PCH_RP(9)]" = "{ |
| .clk_src = 4, |
| .clk_req = 4, |
| .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end #PCIE9 SSD card |
| device ref pcie_rp11 on |
| # Enable SD Card PCIE 11 using clk 2 |
| register "pcie_rp[PCH_RP(11)]" = "{ |
| .clk_src = 2, |
| .clk_req = 2, |
| .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end #PCIE11 SD card |
| device ref tbt_pcie_rp0 on end |
| device ref tbt_pcie_rp1 on end |
| device ref tbt_pcie_rp2 on end |
| device ref tbt_pcie_rp3 on end |
| device ref tcss_xhci on end |
| device ref tcss_dma0 on end |
| device ref tcss_dma1 on end |
| device ref cnvi_wifi on |
| chip drivers/wifi/generic |
| register "wake" = "GPE0_PME_B0" |
| register "is_untrusted" = "true" |
| device generic 0 on end |
| end |
| end |
| device ref i2c0 on end |
| device ref i2c1 on end |
| device ref i2c2 on end |
| device ref i2c3 on end |
| device ref sata on end |
| device ref i2c4 on end |
| device ref i2c5 on end |
| device ref pcie_rp5 on |
| # Enable WLAN Card PCIE 5 using clk 5 |
| register "pcie_rp[PCH_RP(5)]" = "{ |
| .clk_src = 5, |
| .clk_req = 5, |
| .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end #PCIE5 WLAN card |
| device ref pcie_rp6 on |
| # Enable WWAN Card PCIE 6 using clk 3 |
| register "pcie_rp[PCH_RP(6)]" = "{ |
| .clk_src = 3, |
| .clk_req = 3, |
| .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| end #PCIE6 WWAN card |
| device ref gspi1 on end |
| device ref hda on end |
| end |
| end |