| /* SPDX-License-Identifier: GPL-2.0-only */ |
| |
| #include <baseboard/variants.h> |
| #include <commonlib/helpers.h> |
| #include <soc/meminit.h> |
| |
| const struct lpddr4_swizzle_cfg mc_apl7_lpddr4_swizzle = { |
| /* CH0_DQA[0:31] SoC pins -> U22 LPDDR4 module pins */ |
| .phys[LP4_PHYS_CH0A] = { |
| /* DQA[0:7] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS0] = { 0, 1, 5, 3, 4, 7, 6, 2 }, |
| /* DQA[8:15] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS1] = { 11, 15, 14, 9, 8, 12, 13, 10 }, |
| /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS2] = { 16, 22, 23, 21, 19, 17, 18, 20 }, |
| /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS3] = { 30, 26, 31, 25, 24, 27, 28, 29 }, |
| }, |
| .phys[LP4_PHYS_CH0B] = { |
| /* DQA[0:7] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS0] = { 7, 3, 2, 1, 4, 0, 6, 5 }, |
| /* DQA[8:15] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS1] = { 14, 8, 9, 15, 10, 13, 12, 11 }, |
| /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS2] = { 23, 21, 20, 16, 19, 17, 18, 22 }, |
| /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS3] = { 24, 25, 26, 28, 29, 31, 30, 27 }, |
| }, |
| .phys[LP4_PHYS_CH1A] = { |
| /* DQA[0:7] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS0] = { 6, 3, 1, 7, 4, 2, 5, 0 }, |
| /* DQA[8:15] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS1] = { 14, 15, 12, 13, 11, 8, 10, 9 }, |
| /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS2] = { 16, 22, 17, 18, 20, 21, 23, 19 }, |
| /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS3] = { 31, 28, 26, 25, 29, 24, 27, 30 }, |
| }, |
| .phys[LP4_PHYS_CH1B] = { |
| /* DQA[0:7] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS0] = { 3, 5, 7, 4, 1, 0, 6, 2 }, |
| /* DQA[8:15] pins of LPDDR4 module. */ |
| .dqs[LP4_DQS1] = { 14, 13, 10, 11, 15, 9, 8, 12 }, |
| /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS2] = { 23, 18, 19, 22, 16, 17, 21, 20 }, |
| /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ |
| .dqs[LP4_DQS3] = { 24, 31, 30, 29, 26, 27, 25, 28 }, |
| }, |
| }; |
| |
| const struct lpddr4_swizzle_cfg *variant_lpddr4_swizzle_config(void) |
| { |
| return &mc_apl7_lpddr4_swizzle; |
| } |