commit 31218a4259708233c17fa8b09fa9d9c06ea1f2ad
author Patrick Rudolph <patrick.rudolph@9elements.com> Mon Nov 30 15:50:06 2020 +0100
committer Patrick Georgi <pgeorgi@google.com> Thu Feb 04 10:21:42 2021 +0000
tree a1d32df5213f557c61430bc341da1b64aa7f7c4d
parent 37cae540343d8f02258c3209f90114e7189753e2

drivers/intel/fsp2_0: Fix running on x86_64

Add new Kconfig symbols to mark FSP binary as x86_32.
Fix the FSP headers and replace void pointers by fixed sized integers
depending on the used mode to compile the FSP.
This issue has been reported here:
https://github.com/intel/FSP/issues/59

This is necessary to run on x86_64, as pointers have different size.

Add preprocessor error to warn that x86_64 FSP isn't supported by the
current code.

Tested on Intel Skylake. FSP-M no longer returns the error "Invalid
Parameter".

Change-Id: I6015005c4ee3fc2f361985cf8cff896bcefd04fb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/drivers/intel/fsp2_0/silicon_init.c

diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 26ff59d..8572b24 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -86,7 +86,7 @@
 	struct fsp_multi_phase_params multi_phase_params;
 	struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number;
 
-	supd = (FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
+	supd = (FSPS_UPD *) (uintptr_t)(hdr->cfg_region_offset + hdr->image_base);
 
 	fsp_verify_upd_header_signature(supd->FspUpdHeader.Signature, FSPS_UPD_SIGNATURE);
 
@@ -110,14 +110,14 @@
 		logo_entry = soc_load_logo(upd);
 
 	/* Call SiliconInit */
-	silicon_init = (void *) (hdr->image_base +
+	silicon_init = (void *) (uintptr_t)(hdr->image_base +
 				 hdr->silicon_init_entry_offset);
 	fsp_debug_before_silicon_init(silicon_init, supd, upd);
 
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
 	post_code(POST_FSP_SILICON_INIT);
 
-	if (ENV_X86_64)
+	if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32))
 		status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd);
 	else
 		status = silicon_init(upd);
@@ -145,7 +145,7 @@
 		return;
 
 	/* Call MultiPhaseSiInit */
-	multi_phase_si_init = (void *) (hdr->image_base +
+	multi_phase_si_init = (void *) (uintptr_t)(hdr->image_base +
 			 hdr->multi_phase_si_init_entry_offset);
 
 	/* Implementing multi_phase_si_init() is optional as per FSP 2.2 spec */