| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; either version 2 of the License, or |
| ## (at your option) any later version. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82371EB),y) |
| |
| bootblock-y += bootblock.c |
| |
| ramstage-y += i82371eb.c |
| ramstage-y += isa.c |
| ramstage-y += ide.c |
| ramstage-y += usb.c |
| ramstage-y += smbus.c |
| ramstage-y += reset.c |
| ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c |
| ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.c |
| ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.c |
| |
| romstage-y += early_pm.c |
| romstage-y += early_smbus.c |
| |
| endif |