| /* |
| * This file is part of the coreboot project. |
| * |
| * Copyright (C) 2016 Google Inc. |
| * Copyright (C) 2016 Intel Corporation |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include <rules.h> |
| #include <gpio.h> |
| #include <soc/gpio.h> |
| #include <vendorcode/google/chromeos/chromeos.h> |
| |
| #include "gpio.h" |
| |
| #if ENV_RAMSTAGE |
| #include <boot/coreboot_tables.h> |
| |
| void fill_lb_gpios(struct lb_gpios *gpios) |
| { |
| struct lb_gpio chromeos_gpios[] = { |
| {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, |
| {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, |
| {-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"}, |
| {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, |
| {-1, ACTIVE_HIGH, 0, "power"}, |
| {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, |
| {GPIO_EC_IN_RW, ACTIVE_HIGH, |
| gpio_get(GPIO_EC_IN_RW), "EC in RW"}, |
| }; |
| lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); |
| } |
| #endif /* ENV_RAMSTAGE */ |
| |
| int get_write_protect_state(void) |
| { |
| /* Read PCH_WP GPIO. */ |
| return gpio_get(GPIO_PCH_WP); |
| } |
| |
| static const struct cros_gpio cros_gpios[] = { |
| CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), |
| CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), |
| }; |
| |
| void mainboard_chromeos_acpi_generate(void) |
| { |
| chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); |
| } |