| fw_config |
| field STORAGE 2 3 |
| option STORAGE_UNKNOWN 0 |
| option STORAGE_UFS 1 |
| option STORAGE_NVME 2 |
| end |
| end |
| |
| chip soc/intel/alderlake |
| |
| register "sagv" = "SaGv_Enabled" |
| |
| # Intel Common SoC Config |
| #+-------------------+---------------------------+ |
| #| Field | Value | |
| #+-------------------+---------------------------+ |
| #| I2C0 | Audio | |
| #| I2C1 | cr50 TPM. Early init is | |
| #| | required to set up a BAR | |
| #| | for TPM communication | |
| #| I2C3 | TouchScreen | |
| #| I2C5 | Trackpad | |
| #+-------------------+---------------------------+ |
| register "common_soc_config" = "{ |
| .i2c[0] = { |
| .speed = I2C_SPEED_FAST, |
| }, |
| .i2c[1] = { |
| .early_init = 1, |
| .speed = I2C_SPEED_FAST, |
| }, |
| .i2c[3] = { |
| .speed = I2C_SPEED_FAST, |
| }, |
| .i2c[5] = { |
| .speed = I2C_SPEED_FAST, |
| }, |
| }" |
| |
| register "serial_io_i2c_mode" = "{ |
| [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| [PchSerialIoIndexI2C2] = PchSerialIoDisabled, |
| [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| }" |
| |
| # SOC Aux orientation override: |
| # This is a bitfield that corresponds to up to 4 TCSS ports. |
| # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2. |
| # TcssAuxOri = 0101b |
| # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports |
| # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the |
| # motherboard to USBC connector |
| register "tcss_aux_ori" = "1" |
| register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" |
| |
| register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2 |
| register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2 Port 3 |
| register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4 |
| register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 6 |
| register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0 |
| register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port 8 |
| |
| register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3 Port 0 |
| register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port |
| register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Disable USB3 Port 2 |
| register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable USB3 Port 3 |
| |
| register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" # Type C port C0 |
| register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Disable Port1 |
| register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC1)" # Type C port C1 |
| register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable Port3 |
| |
| # FIVR configurations for brya are disabled since the board doesn't have V1p05 and Vnn |
| # bypass rails implemented. |
| register "ext_fivr_settings" = "{ |
| .configure_ext_fivr = 1, |
| }" |
| |
| # Enable the Cnvi BT Audio Offload |
| register "cnvi_bt_audio_offload" = "1" |
| |
| device domain 0 on |
| device ref i2c0 on |
| chip drivers/i2c/generic |
| register "hid" = ""RTL5682"" |
| register "name" = ""RT58"" |
| register "desc" = ""Realtek RT5682"" |
| register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)" |
| register "property_count" = "1" |
| register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| register "property_list[0].name" = ""realtek,jd-src"" |
| register "property_list[0].integer" = "1" |
| device i2c 1a on end |
| end |
| chip drivers/generic/alc1015 |
| register "hid" = ""RTL1019"" |
| register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" |
| device generic 1 on end |
| end |
| end #I2C0 |
| device ref i2c1 on |
| chip drivers/i2c/tpm |
| register "hid" = ""GOOG0005"" |
| register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" |
| device i2c 50 on end |
| end |
| end #I2C1 |
| device ref i2c3 on |
| chip drivers/i2c/hid |
| register "generic.hid" = ""GTCH7503"" |
| register "generic.desc" = ""G2TOUCH Touchscreen"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" |
| register "generic.probed" = "1" |
| register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" |
| register "generic.reset_delay_ms" = "50" |
| register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" |
| register "generic.enable_delay_ms" = "1" |
| register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" |
| register "generic.stop_off_delay_ms" = "2" |
| register "generic.has_power_resource" = "1" |
| register "hid_desc_reg_offset" = "0x01" |
| device i2c 40 on end |
| end |
| chip drivers/i2c/hid |
| register "generic.hid" = ""ELAN9004"" |
| register "generic.desc" = ""ELAN Touchscreen"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" |
| register "generic.probed" = "1" |
| register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" |
| register "generic.reset_delay_ms" = "20" |
| register "generic.reset_off_delay_ms" = "2" |
| register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" |
| register "generic.enable_delay_ms" = "1" |
| register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" |
| register "generic.stop_delay_ms" = "150" |
| register "generic.stop_off_delay_ms" = "2" |
| register "generic.has_power_resource" = "1" |
| register "hid_desc_reg_offset" = "0x01" |
| device i2c 10 on end |
| end |
| end #I2C3 |
| device ref i2c5 on |
| chip drivers/i2c/generic |
| register "hid" = ""ELAN0000"" |
| register "desc" = ""ELAN Touchpad"" |
| register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| register "wake" = "GPE0_DW2_14" |
| register "detect" = "1" |
| device i2c 15 on end |
| end |
| chip drivers/i2c/hid |
| register "generic.hid" = ""SYNA0000"" |
| register "generic.cid" = ""ACPI0C50"" |
| register "generic.desc" = ""Synaptics Touchpad"" |
| register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| register "generic.wake" = "GPE0_DW2_14" |
| register "generic.detect" = "1" |
| register "hid_desc_reg_offset" = "0x20" |
| device i2c 2c on end |
| end |
| end #I2C5 |
| device ref pcie_rp8 off end |
| device ref pcie_rp9 on |
| # Enable NVMe PCIE 9 using clk 1 |
| register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| .clk_src = 1, |
| .clk_req = 1, |
| .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| }" |
| probe STORAGE STORAGE_UNKNOWN |
| probe STORAGE STORAGE_NVME |
| end |
| device ref ish on |
| chip drivers/intel/ish |
| register "add_acpi_dma_property" = "true" |
| device generic 0 on end |
| end |
| probe STORAGE STORAGE_UNKNOWN |
| probe STORAGE STORAGE_UFS |
| end |
| device ref ufs on |
| probe STORAGE STORAGE_UNKNOWN |
| probe STORAGE STORAGE_UFS |
| end |
| device ref tbt_pcie_rp0 off end |
| device ref tbt_pcie_rp1 off end |
| device ref tbt_pcie_rp2 off end |
| device ref tcss_dma0 off end |
| device ref tcss_dma1 off end |
| device ref pch_espi on |
| chip ec/google/chromeec |
| use conn0 as mux_conn[0] |
| use conn1 as mux_conn[2] |
| device pnp 0c09.0 on end |
| end |
| end |
| device ref pmc hidden |
| chip drivers/intel/pmc_mux |
| device generic 0 on |
| chip drivers/intel/pmc_mux/conn |
| use usb2_port1 as usb2_port |
| use tcss_usb3_port1 as usb3_port |
| device generic 0 alias conn0 on end |
| end |
| chip drivers/intel/pmc_mux/conn |
| use usb2_port2 as usb2_port |
| use tcss_usb3_port3 as usb3_port |
| device generic 1 alias conn1 on end |
| end |
| end |
| end |
| end |
| device ref tcss_xhci on |
| chip drivers/usb/acpi |
| device ref tcss_root_hub on |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| device ref tcss_usb3_port1 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 Type-C Port C1 (DB)"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" |
| device ref tcss_usb3_port3 on end |
| end |
| end |
| end |
| end |
| device ref xhci on |
| chip drivers/usb/acpi |
| device ref xhci_root_hub on |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))" |
| device ref usb2_port1 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Type-C Port C1 (DB)"" |
| register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| device ref usb2_port2 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Camera"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| device ref usb2_port6 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Type-A Port A0 (MLB)"" |
| register "type" = "UPC_TYPE_A" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| device ref usb2_port8 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB2 Bluetooth"" |
| register "type" = "UPC_TYPE_INTERNAL" |
| register "reset_gpio" = |
| "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| device ref usb2_port10 on end |
| end |
| chip drivers/usb/acpi |
| register "desc" = ""USB3 Type-A Port A0 (MLB)"" |
| register "type" = "UPC_TYPE_USB3_A" |
| register "use_custom_pld" = "true" |
| register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))" |
| device ref usb3_port1 on end |
| end |
| end |
| end |
| end |
| end |
| end |