Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
0e64617d7d8adcd4d3db16eed7a34604691c2ee6
/
.
/
src
/
cpu
/
intel
/
speedstep
/
Makefile.inc
blob: 130eb0c79da9b9c36763bb508d69832c43c173b4 [
file
] [
log
] [
blame
]
ramstage
-
$
(
CONFIG_GENERATE_ACPI_TABLES
)
+=
acpi
.
c speedstep
.
c
ramstage
-
$
(
CONFIG_CPU_INTEL_MODEL_1067X
)
+=
speedstep
.
c