| chip northbridge/intel/sandybridge |
| register "gfx" = "GMA_STATIC_DISPLAYS(1)" |
| register "gpu_cpu_backlight" = "0x00000060" |
| register "gpu_dp_b_hotplug" = "4" |
| register "gpu_dp_c_hotplug" = "4" |
| register "gpu_dp_d_hotplug" = "4" |
| register "gpu_panel_port_select" = "PANEL_PORT_LVDS" |
| register "gpu_panel_power_backlight_off_delay" = "2000" |
| register "gpu_panel_power_backlight_on_delay" = "2000" |
| register "gpu_panel_power_cycle_delay" = "5" |
| register "gpu_panel_power_down_delay" = "500" |
| register "gpu_panel_power_up_delay" = "600" |
| register "gpu_pch_backlight" = "0x041e041e" |
| |
| device domain 0 on |
| subsystemid 0x17aa 0x2205 inherit |
| |
| device ref host_bridge on end # Host bridge Host bridge |
| device ref peg10 off end # PCIe Bridge for discrete graphics |
| device ref igd on end # Internal graphics VGA controller |
| |
| chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| register "docking_supported" = "1" |
| register "gen1_dec" = "0x00000000" |
| register "gen2_dec" = "0x000c0701" |
| register "gen3_dec" = "0x000c0069" |
| register "gen4_dec" = "0x000c06a1" |
| register "gpi13_routing" = "2" |
| register "gpi7_routing" = "2" |
| register "pcie_hotplug_map" = "{ 0, 1, 0, 1, 0, 0, 0, 0 }" |
| register "pcie_port_coalesce" = "true" |
| register "sata_interface_speed_support" = "0x3" |
| register "sata_port_map" = "0x5" |
| register "superspeed_capable_ports" = "0x0000000f" |
| register "xhci_overcurrent_mapping" = "0x00000c03" |
| register "xhci_switchable_ports" = "0x0000000f" |
| |
| register "spi_uvscc" = "0x2005" |
| register "spi_lvscc" = "0x2005" |
| |
| device ref xhci on end # USB 3.0 Controller |
| device ref mei1 on end # Management Engine Interface 1 |
| device ref mei2 off end # Management Engine Interface 2 |
| device ref me_ide_r off end # Management Engine IDE-R |
| device ref me_kt off end # Management Engine KT |
| device ref gbe off end # Intel Gigabit Ethernet |
| device ref ehci2 on end # USB2 EHCI #2 |
| device ref hda on end # High Definition Audio controller |
| device ref pcie_rp1 on end # PCIe Port #1 |
| device ref pcie_rp2 on end # PCIe Port #2 |
| device ref pcie_rp3 off end # PCIe Port #3 |
| device ref pcie_rp4 on end # PCIe Port #4 |
| device ref pcie_rp5 off end # PCIe Port #5 |
| device ref pcie_rp6 off end # PCIe Port #6 |
| device ref pcie_rp7 off end # PCIe Port #7 |
| device ref pcie_rp8 off end # PCIe Port #8 |
| device ref ehci1 on end # USB2 EHCI #1 |
| device ref pci_bridge off end # PCI bridge |
| device ref lpc on # LPC bridge PCI-LPC bridge |
| chip drivers/pc80/tpm |
| device pnp 0c31.0 on end |
| end |
| end |
| device ref sata1 on end # SATA Controller 1 |
| device ref smbus on # SMBus |
| chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip |
| device i2c 54 on end |
| device i2c 55 on end |
| device i2c 56 on end |
| device i2c 57 on end |
| device i2c 5c on end |
| device i2c 5d on end |
| device i2c 5e on end |
| device i2c 5f on end |
| end |
| end |
| device ref sata2 off end # SATA Controller 2 |
| device ref thermal off end # Thermal |
| end |
| end |
| end |