ACPI: Add usb_charge_mode_from_gnvs()
Early Chromebook generations stored the information about
USB port power control for S3/S5 sleepstates in GNVS, although
the configuration is static.
Reduce code duplication and react to ACPI S4 as if it was ACPI
S5 request.
Change-Id: I7e6f37a023b0e9317dcf0355dfa70e28d51cdad9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
diff --git a/src/mainboard/google/auron/smihandler.c b/src/mainboard/google/auron/smihandler.c
index 237a2b3..0fc3588 100644
--- a/src/mainboard/google/auron/smihandler.c
+++ b/src/mainboard/google/auron/smihandler.c
@@ -8,7 +8,6 @@
#include <ec/google/chromeec/smm.h>
#include <southbridge/intel/lynxpoint/lp_gpio.h>
#include <soc/iomap.h>
-#include <soc/nvs.h>
#include "ec.h"
#include <variant/onboard.h>
@@ -36,28 +35,17 @@
void mainboard_smi_sleep(u8 slp_typ)
{
/* Disable USB charging if required */
+ /* NOTE: Setting of usb0 _may_ also control usb1 here. */
+ chromeec_set_usb_charge_mode(slp_typ);
+
switch (slp_typ) {
case ACPI_S3:
- if (gnvs->s3u0 == 0) {
- google_chromeec_set_usb_charge_mode(
- 0, USB_CHARGE_MODE_DISABLED);
- google_chromeec_set_usb_charge_mode(
- 1, USB_CHARGE_MODE_DISABLED);
- }
-
mainboard_disable_gpios();
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
break;
case ACPI_S5:
- if (gnvs->s5u0 == 0) {
- google_chromeec_set_usb_charge_mode(
- 0, USB_CHARGE_MODE_DISABLED);
- google_chromeec_set_usb_charge_mode(
- 1, USB_CHARGE_MODE_DISABLED);
- }
-
mainboard_disable_gpios();
/* Enable wake events */