Add predefined __ROMSTAGE__ and __RAMSTAGE__ macros
This patch adds the macros __ROMSTAGE__ and __RAMSTAGE__ which get
predefined in their respective stages by make, so that we have one
specific macro for every stage. It also renames __BOOT_BLOCK__ and
__VER_STAGE__ to __BOOTBLOCK__ and __VERSTAGE__ for consistency.
This change is intended to provide finer control and clearer
communication of intent after we added a new (optional) stage that falls
under __PRE_RAM__, and will hopefully provide some robustness for the
future (we don't want to end up always checking for romstage with #if
defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__) &&
!defined(__VER_STAGE__) && !defined(__YET_ANOTHER_PRERAM_STAGE__)). The
__PRE_RAM__ macro stays as it is since many features do in fact need to
differentiate on whether RAM is available. (Some also depend on whether
RAM is available at the end of a stage, in which case #if
!defined(__PRE_RAM__) || defined(__ROMSTAGE__) should now be
authoritative.)
It's unfeasable to change all existing occurences of __PRE_RAM__ that
would be better described with __ROMSTAGE__, so this patch only
demonstratively changes a few obvious ones in core code.
BUG=None
TEST=None (tested together with dependent patch).
Change-Id: I6a06d0f42c27a2feeb778a4acd35dd14bb53f744
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a4ad042746c1d3a7a3bfda422d26e0d3b9f9ae42
Original-Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/219172
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9304
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
diff --git a/Makefile.inc b/Makefile.inc
index d444457..ea2553f 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -116,12 +116,14 @@
$(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(filter-out %.ld,$(1))); $$(LD_ramstage) -o $$@ -r $$^ ) \
$(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(filter-out %.ld, $(call files-in-dir,$(d),$(1))),$(ramstage-objs))))
-romstage-generic-ccopts += -D__PRE_RAM__
+bootblock-generic-ccopts += -D__PRE_RAM__ -D__BOOTBLOCK__
+romstage-generic-ccopts += -D__PRE_RAM__ -D__ROMSTAGE__
+ramstage-generic-ccopts += -D__RAMSTAGE__
ifeq ($(CONFIG_TRACE),y)
-ramstage-c-ccopts:= -finstrument-functions
+ramstage-c-ccopts += -finstrument-functions
endif
ifeq ($(CONFIG_COVERAGE),y)
-ramstage-c-ccopts+=-fprofile-arcs -ftest-coverage
+ramstage-c-ccopts += -fprofile-arcs -ftest-coverage
endif
# try to fetch non-optional submodules if the source is under git
@@ -132,8 +134,6 @@
forgetthis:=$(if $(GIT),$(shell git submodule update --init --checkout 3rdparty))
endif
-bootblock-generic-ccopts += -D__BOOTBLOCK__ -D__PRE_RAM__
-
ramstage-c-deps:=$$(OPTION_TABLE_H)
romstage-c-deps:=$$(OPTION_TABLE_H)
verstage-c-deps:=$$(OPTION_TABLE_H)
diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h
index 307babd..e06d17c 100644
--- a/src/include/romstage_handoff.h
+++ b/src/include/romstage_handoff.h
@@ -40,7 +40,7 @@
uint32_t ramstage_entry_point;
};
-#if defined(__PRE_RAM__)
+#if defined(__ROMSTAGE__)
#if CONFIG_EARLY_CBMEM_INIT
/* The romstage_handoff_find_or_add() function provides the necessary logic
* for initializing the romstage_handoff structure in cbmem. Different components
diff --git a/src/soc/rockchip/rk3288/media.c b/src/soc/rockchip/rk3288/media.c
index c6ceeb9..2b023e1 100644
--- a/src/soc/rockchip/rk3288/media.c
+++ b/src/soc/rockchip/rk3288/media.c
@@ -24,7 +24,7 @@
int init_default_cbfs_media(struct cbfs_media *media)
{
-#if defined(__BOOT_BLOCK__) || defined(__VER_STAGE__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
return initialize_rockchip_spi_cbfs_media(media,
(void *)CONFIG_CBFS_SRAM_CACHE_ADDRESS,
CONFIG_CBFS_SRAM_CACHE_SIZE);
diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.h b/src/soc/samsung/exynos5250/alternate_cbfs.h
index 72a30ac..a064b62 100644
--- a/src/soc/samsung/exynos5250/alternate_cbfs.h
+++ b/src/soc/samsung/exynos5250/alternate_cbfs.h
@@ -36,7 +36,7 @@
#define OM_STAT_SPI 0x14
#define OM_STAT_MASK 0x7f
-#if defined(__BOOT_BLOCK__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
/* A small space in IRAM to hold the romstage-only image */
static void * const alternate_cbfs_buffer =
(void *)CONFIG_CBFS_CACHE_ADDRESS;
diff --git a/src/soc/samsung/exynos5250/gpio.c b/src/soc/samsung/exynos5250/gpio.c
index 3e50791..98c177d 100644
--- a/src/soc/samsung/exynos5250/gpio.c
+++ b/src/soc/samsung/exynos5250/gpio.c
@@ -211,12 +211,6 @@
*/
#define GPIO_DELAY_US 5
-#ifndef __BOOTBLOCK__
-/*
- * FIXME(dhendrix): These functions use udelay, which has dependencies on
- * pwm code and timer code. These aren't necessary for the bootblock and
- * bloat the image significantly.
- */
int gpio_read_mvl3(unsigned gpio)
{
int high, low;
@@ -252,7 +246,6 @@
return value;
}
-#endif /* __BOOTBLOCK__ */
/*
* Display Exynos GPIO information
diff --git a/src/soc/samsung/exynos5420/alternate_cbfs.h b/src/soc/samsung/exynos5420/alternate_cbfs.h
index af7751d..8122a25 100644
--- a/src/soc/samsung/exynos5420/alternate_cbfs.h
+++ b/src/soc/samsung/exynos5420/alternate_cbfs.h
@@ -36,7 +36,7 @@
#define OM_STAT_SPI 0x14
#define OM_STAT_MASK 0x7f
-#if defined(__BOOT_BLOCK__)
+#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
/* A small space in IRAM to hold the romstage-only image */
static void * const alternate_cbfs_buffer =
(void *)CONFIG_CBFS_CACHE_ADDRESS;
diff --git a/src/soc/samsung/exynos5420/gpio.c b/src/soc/samsung/exynos5420/gpio.c
index ac82bf7..74d8113 100644
--- a/src/soc/samsung/exynos5420/gpio.c
+++ b/src/soc/samsung/exynos5420/gpio.c
@@ -211,12 +211,6 @@
*/
#define GPIO_DELAY_US 15
-#ifndef __BOOTBLOCK__
-/*
- * FIXME(dhendrix): These functions use udelay, which has dependencies on
- * pwm code and timer code. These aren't necessary for the bootblock and
- * bloat the image significantly.
- */
int gpio_read_mvl3(unsigned gpio)
{
int high, low;
@@ -252,7 +246,6 @@
return value;
}
-#endif /* __BOOTBLOCK__ */
/*
* Display Exynos GPIO information
diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c
index 3a499d5..edaa0d9 100644
--- a/src/vendorcode/google/chromeos/chromeos.c
+++ b/src/vendorcode/google/chromeos/chromeos.c
@@ -107,7 +107,7 @@
#endif
}
-#ifdef __PRE_RAM__
+#ifdef __ROMSTAGE__
void __attribute__((weak)) save_chromeos_gpios(void)
{
// Can be implemented by a mainboard