| Andrew Litt | 2cf7311 | 2014-09-12 23:43:19 -0500 | [diff] [blame] | 1 | coreboot.rom: 8192 kB, bootblocksize 1816, romsize 8388608, offset 0x400000 |
| 2 | alignment: 64 bytes, architecture: x86 |
| 3 | |
| 4 | Name Offset Type Size |
| 5 | cmos_layout.bin 0x400000 cmos_layout 1448 |
| 6 | pci8086,0106.rom 0x400600 optionrom 65536 |
| 7 | cpu_microcode_blob.bin 0x410640 microcode 20480 |
| Andrew Litt | 6a37271 | 2014-09-13 00:08:22 -0500 | [diff] [blame] | 8 | fallback/romstage 0x415680 stage 33768 |
| 9 | fallback/ramstage 0x41dac0 stage 82897 |
| 10 | fallback/payload 0x431f00 payload 55571 |
| 11 | config 0x43f880 raw 4892 |
| 12 | (empty) 0x440c00 null 3535768 |
| Andrew Litt | 2cf7311 | 2014-09-12 23:43:19 -0500 | [diff] [blame] | 13 | mrc.bin 0x79ffc0 (unknown) 195732 |
| 14 | (empty) 0x7cfcc0 null 728 |
| 15 | mrc.cache 0x7cffc0 (unknown) 65536 |
| 16 | (empty) 0x7e0000 null 129176 |