lenovo/g505s/4.6-835-g130f266-dirty/2017-07-25T13_55_47Z/coreboot_console.txt

coreboot-4.6-835-g130f266-dirty Mon Jul 24 23:59:51 UTC 2017 ramstage starting...
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 5 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:10.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 00ff.1: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 10: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:00.2: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
  PCI: 00:02.0: enabled 0
  PCI: 00:03.0: enabled 0
  PCI: 00:04.0: enabled 1
  PCI: 00:05.0: enabled 1
  PCI: 00:06.0: enabled 0
  PCI: 00:07.0: enabled 0
  PCI: 00:08.0: enabled 0
  PCI: 00:09.0: enabled 0
  PCI: 00:10.0: enabled 0
  PCI: 00:11.0: enabled 1
  PCI: 00:12.0: enabled 1
  PCI: 00:12.2: enabled 1
  PCI: 00:13.0: enabled 1
  PCI: 00:13.2: enabled 1
  PCI: 00:14.0: enabled 1
   I2C: 00:50: enabled 1
   I2C: 00:51: enabled 1
  PCI: 00:14.2: enabled 1
  PCI: 00:14.3: enabled 1
   PNP: 00ff.1: enabled 1
  PCI: 00:14.4: enabled 1
  PCI: 00:14.5: enabled 0
  PCI: 00:14.6: enabled 0
  PCI: 00:14.7: enabled 0
  PCI: 00:15.0: enabled 0
  PCI: 00:15.1: enabled 0
  PCI: 00:15.2: enabled 0
  PCI: 00:15.3: enabled 0
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
Mainboard LENOVO G505S Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
CPU: APIC: 10 enabled
lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
CPU: APIC: 11 enabled
lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12
CPU: APIC: 12 enabled
lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13
CPU: APIC: 13 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 108 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1410] enabled
PCI: 00:00.2 [1022/1419] ops
PCI: 00:00.2 [1022/1419] enabled
PCI: 00:01.0 [1002/9903] enabled
PCI: 00:01.1 [1002/9902] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1414] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:05.0 subordinate bus PCI Express
PCI: 00:05.0 [1022/1415] enabled
hudson_enable()
hudson_enable()
PCI: 00:11.0 [1022/7801] ops
PCI: 00:11.0 [1022/7801] enabled
hudson_enable()
PCI: 00:12.0 [1022/7807] ops
PCI: 00:12.0 [1022/7807] enabled
hudson_enable()
PCI: 00:12.2 [1022/7808] ops
PCI: 00:12.2 [1022/7808] enabled
hudson_enable()
PCI: 00:13.0 [1022/7807] ops
PCI: 00:13.0 [1022/7807] enabled
hudson_enable()
PCI: 00:13.2 [1022/7808] ops
PCI: 00:13.2 [1022/7808] enabled
hudson_enable()
PCI: 00:14.0 [1022/780b] bus ops
PCI: 00:14.0 [1022/780b] enabled
hudson_enable()
PCI: 00:14.2 [1022/780d] ops
PCI: 00:14.2 [1022/780d] enabled
hudson_enable()
PCI: 00:14.3 [1022/780e] bus ops
PCI: 00:14.3 [1022/780e] enabled
hudson_enable()
PCI: 00:14.4 [1022/780f] bus ops
PCI: 00:14.4 [1022/780f] enabled
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
PCI: 00:16.0 [1022/7807] ops
PCI: 00:16.0 [1022/7807] enabled
PCI: 00:16.2 [1022/7808] ops
PCI: 00:16.2 [1022/7808] enabled
PCI: 00:18.0 [1022/1400] ops
PCI: 00:18.0 [1022/1400] enabled
PCI: 00:18.1 [1022/1401] enabled
PCI: 00:18.2 [1022/1402] enabled
PCI: 00:18.3 [1022/1403] enabled
PCI: 00:18.4 [1022/1404] enabled
PCI: 00:18.5 [1022/1405] enabled
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1969/10a0] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x10 @ 0x58
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
scan_bus: scanning of bus PCI: 00:04.0 took 84 usecs
PCI: 00:05.0 scanning...
do_pci_scan_bridge for PCI: 00:05.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [168c/0036] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
scan_bus: scanning of bus PCI: 00:05.0 took 122 usecs
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 44 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 00ff.1 enabled
PNP: 00ff.0 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 45 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 03
scan_bus: scanning of bus PCI: 00:14.4 took 38 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 754 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 1014 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 8 run 6124 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
fx_devs=0x1
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0 done
PCI: 00:05.0 read_resources bus 2 link: 0
PCI: 00:05.0 read_resources bus 2 link: 0 done
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 3 link: 0
PCI: 00:14.4 read_resources bus 3 link: 0 done
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
   PCI: 00:02.0
   PCI: 00:03.0
   PCI: 00:04.0 child on link 0 PCI: 01:00.0
   PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
    PCI: 01:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18
   PCI: 00:05.0 child on link 0 PCI: 02:00.0
   PCI: 00:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10
    PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
   PCI: 00:06.0
   PCI: 00:07.0
   PCI: 00:08.0
   PCI: 00:09.0
   PCI: 00:10.0
   PCI: 00:11.0
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:11.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.3 child on link 0 PNP: 00ff.1
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 00ff.1
    PNP: 00ff.0
   PCI: 00:14.4
   PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:14.5
   PCI: 00:14.6
   PCI: 00:14.7
   PCI: 00:15.0
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:16.2
   PCI: 00:16.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 18 *  [0x0 - 0x7f] io
PCI: 00:04.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:04.0 1c *  [0x0 - 0xfff] io
PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
DOMAIN: 0000 io: base: 1428 size: 1428 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x3ffff] mem
PCI: 00:04.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:05.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x7ffff] mem
PCI: 02:00.0 30 *  [0x80000 - 0x8ffff] mem
PCI: 00:05.0 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:04.0 20 *  [0x10000000 - 0x100fffff] mem
PCI: 00:05.0 20 *  [0x10100000 - 0x101fffff] mem
PCI: 00:00.2 44 *  [0x10200000 - 0x1027ffff] mem
PCI: 00:01.0 18 *  [0x10280000 - 0x102bffff] mem
PCI: 00:01.1 10 *  [0x102c0000 - 0x102c3fff] mem
PCI: 00:14.2 10 *  [0x102c4000 - 0x102c7fff] mem
PCI: 00:12.0 10 *  [0x102c8000 - 0x102c8fff] mem
PCI: 00:13.0 10 *  [0x102c9000 - 0x102c9fff] mem
PCI: 00:16.0 10 *  [0x102ca000 - 0x102cafff] mem
PCI: 00:11.0 24 *  [0x102cb000 - 0x102cb7ff] mem
PCI: 00:12.2 10 *  [0x102cc000 - 0x102cc0ff] mem
PCI: 00:13.2 10 *  [0x102cd000 - 0x102cd0ff] mem
PCI: 00:16.2 10 *  [0x102ce000 - 0x102ce0ff] mem
DOMAIN: 0000 mem: base: 102ce100 size: 102ce100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed)
constrain_resources: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
constrain_resources: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:18.0 c0010058 base f8000000 limit fbffffff mem (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:1428 align:12 gran:0 limit:ffff
PCI: 00:04.0 1c *  [0x1000 - 0x1fff] io
PCI: 00:01.0 14 *  [0x2000 - 0x20ff] io
PCI: 00:11.0 20 *  [0x2400 - 0x240f] io
PCI: 00:11.0 10 *  [0x2410 - 0x2417] io
PCI: 00:11.0 18 *  [0x2418 - 0x241f] io
PCI: 00:11.0 14 *  [0x2420 - 0x2423] io
PCI: 00:11.0 1c *  [0x2424 - 0x2427] io
DOMAIN: 0000 io: next_base: 2428 size: 1428 align: 12 gran: 0 done
PCI: 00:04.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 18 *  [0x1000 - 0x107f] io
PCI: 00:04.0 io: next_base: 1080 size: 1000 align: 12 gran: 12 done
PCI: 00:05.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:05.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:102ce100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:04.0 20 *  [0xf0000000 - 0xf00fffff] mem
PCI: 00:05.0 20 *  [0xf0100000 - 0xf01fffff] mem
PCI: 00:00.2 44 *  [0xf0200000 - 0xf027ffff] mem
PCI: 00:01.0 18 *  [0xf0280000 - 0xf02bffff] mem
PCI: 00:01.1 10 *  [0xf02c0000 - 0xf02c3fff] mem
PCI: 00:14.2 10 *  [0xf02c4000 - 0xf02c7fff] mem
PCI: 00:12.0 10 *  [0xf02c8000 - 0xf02c8fff] mem
PCI: 00:13.0 10 *  [0xf02c9000 - 0xf02c9fff] mem
PCI: 00:16.0 10 *  [0xf02ca000 - 0xf02cafff] mem
PCI: 00:11.0 24 *  [0xf02cb000 - 0xf02cb7ff] mem
PCI: 00:12.2 10 *  [0xf02cc000 - 0xf02cc0ff] mem
PCI: 00:13.2 10 *  [0xf02cd000 - 0xf02cd0ff] mem
PCI: 00:16.2 10 *  [0xf02ce000 - 0xf02ce0ff] mem
DOMAIN: 0000 mem: next_base: f02ce100 size: 102ce100 align: 28 gran: 0 done
PCI: 00:04.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:04.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 01:00.0 10 *  [0xf0000000 - 0xf003ffff] mem
PCI: 00:04.0 mem: next_base: f0040000 size: 100000 align: 20 gran: 20 done
PCI: 00:05.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:05.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:05.0 mem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff
PCI: 02:00.0 10 *  [0xf0100000 - 0xf017ffff] mem
PCI: 02:00.0 30 *  [0xf0180000 - 0xf018ffff] mem
PCI: 00:05.0 mem: next_base: f0190000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0: mmio_basek=00380000, basek=00400000, limitk=00860000
add_uma_resource_below_tolm: uma size 0x20000000, memory start 0xc0000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.2 44 <- [0x00f0200000 - 0x00f027ffff] size 0x00080000 gran 0x13 mem
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0280000 - 0x00f02bffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f02c0000 - 0x00f02c3fff] size 0x00004000 gran 0x0e mem
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f003ffff] size 0x00040000 gran 0x12 mem64
PCI: 01:00.0 18 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 00:05.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:05.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:05.0 20 <- [0x00f0100000 - 0x00f01fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:05.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0100000 - 0x00f017ffff] size 0x00080000 gran 0x13 mem64
PCI: 02:00.0 30 <- [0x00f0180000 - 0x00f018ffff] size 0x00010000 gran 0x10 romem
PCI: 00:05.0 assign_resources, bus 2 link: 0
PCI: 00:11.0 10 <- [0x0000002410 - 0x0000002417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002420 - 0x0000002423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002418 - 0x000000241f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002424 - 0x0000002427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002400 - 0x000000240f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f02cb000 - 0x00f02cb7ff] size 0x00000800 gran 0x0b mem
PCI: 00:12.0 10 <- [0x00f02c8000 - 0x00f02c8fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f02cc000 - 0x00f02cc0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f02c9000 - 0x00f02c9fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f02cd000 - 0x00f02cd0ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f02c4000 - 0x00f02c7fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:16.0 10 <- [0x00f02ca000 - 0x00f02cafff] size 0x00001000 gran 0x0c mem
PCI: 00:16.2 10 <- [0x00f02ce000 - 0x00f02ce0ff] size 0x00000100 gran 0x08 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 1428 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 102ce100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
  DOMAIN: 0000 resource base 100000000 size 11f000000 align 0 gran 0 limit 0 flags e0004200 index 30
  DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:00.2 resource base f0200000 size 80000 align 19 gran 19 limit f027ffff flags 60000200 index 44
   PCI: 00:01.0
   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
   PCI: 00:01.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 14
   PCI: 00:01.0 resource base f0280000 size 40000 align 18 gran 18 limit f02bffff flags 60000200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base f02c0000 size 4000 align 14 gran 14 limit f02c3fff flags 60000200 index 10
   PCI: 00:02.0
   PCI: 00:03.0
   PCI: 00:04.0 child on link 0 PCI: 01:00.0
   PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
   PCI: 00:04.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:04.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base f0000000 size 40000 align 18 gran 18 limit f003ffff flags 60000201 index 10
    PCI: 01:00.0 resource base 1000 size 80 align 7 gran 7 limit 107f flags 60000100 index 18
   PCI: 00:05.0 child on link 0 PCI: 02:00.0
   PCI: 00:05.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:05.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:05.0 resource base f0100000 size 100000 align 20 gran 20 limit f01fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base f0100000 size 80000 align 19 gran 19 limit f017ffff flags 60000201 index 10
    PCI: 02:00.0 resource base f0180000 size 10000 align 16 gran 16 limit f018ffff flags 60002200 index 30
   PCI: 00:06.0
   PCI: 00:07.0
   PCI: 00:08.0
   PCI: 00:09.0
   PCI: 00:10.0
   PCI: 00:11.0
   PCI: 00:11.0 resource base 2410 size 8 align 3 gran 3 limit 2417 flags 60000100 index 10
   PCI: 00:11.0 resource base 2420 size 4 align 2 gran 2 limit 2423 flags 60000100 index 14
   PCI: 00:11.0 resource base 2418 size 8 align 3 gran 3 limit 241f flags 60000100 index 18
   PCI: 00:11.0 resource base 2424 size 4 align 2 gran 2 limit 2427 flags 60000100 index 1c
   PCI: 00:11.0 resource base 2400 size 10 align 4 gran 4 limit 240f flags 60000100 index 20
   PCI: 00:11.0 resource base f02cb000 size 800 align 12 gran 11 limit f02cb7ff flags 60000200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base f02c8000 size 1000 align 12 gran 12 limit f02c8fff flags 60000200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base f02cc000 size 100 align 12 gran 8 limit f02cc0ff flags 60000200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base f02c9000 size 1000 align 12 gran 12 limit f02c9fff flags 60000200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base f02cd000 size 100 align 12 gran 8 limit f02cd0ff flags 60000200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base f02c4000 size 4000 align 14 gran 14 limit f02c7fff flags 60000201 index 10
   PCI: 00:14.3 child on link 0 PNP: 00ff.1
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 00ff.1
    PNP: 00ff.0
   PCI: 00:14.4
   PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:14.5
   PCI: 00:14.6
   PCI: 00:14.7
   PCI: 00:15.0
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:16.0 resource base f02ca000 size 1000 align 12 gran 12 limit f02cafff flags 60000200 index 10
   PCI: 00:16.2
   PCI: 00:16.2 resource base f02ce000 size 100 align 12 gran 8 limit f02ce0ff flags 60000200 index 10
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 1316 exit 0
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
Enabling resources...
agesawrapper_amdinitmid() returned AGESA_SUCCESS
  ader - leaving domain_enable_resources.
PCI: 00:00.0 subsystem <- 1022/1410
PCI: 00:00.0 cmd <- 06
PCI: 00:00.2 subsystem <- 1022/1410
PCI: 00:00.2 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1410
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1410
PCI: 00:01.1 cmd <- 02
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 06
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1410
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1410
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1410
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1410
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1410
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1410
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1410
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 00
PCI: 00:16.0 cmd <- 02
PCI: 00:16.2 cmd <- 02
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 2 run 6709 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 0 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic CPU ops (good)
Model 15 Init.
CPU ID 0x80000001: 610f01
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x000000021f000000 size 0x11f000000 type 6
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
MTRR: default type WB/UC MTRR counts: 3/3.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
MTRR: 2 base 0x00000000e0000000 mask 0x0000fffff0000000 type 1

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x10 done.
siblings = 03, Initializing SMM for CPU 0
CPU #0 initialized
CPU1: stack_base 00148000, stack_end 00148ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic CPU ops (good)
Model 15 Init.
CPU ID 0x80000001: 610f01
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x11 done.
siblings = 03, Initializing SMM for CPU 1
CPU #1 initialized
CPU2: stack_base 00147000, stack_end 00147ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic CPU ops (good)
Model 15 Init.
CPU ID 0x80000001: 610f01
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x12 done.
siblings = 03, Initializing SMM for CPU 2
CPU #2 initialized
CPU3: stack_base 00146000, stack_end 00146ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f01
CPU: family 15, model 10, stepping 01
Using generic CPU ops (good)
Model 15 Init.
CPU ID 0x80000001: 610f01
CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x13 done.
siblings = 03, Initializing SMM for CPU 3
CPU #3 initialized
All AP CPUs stopped (78 loops)
CPU0: stack: 00149000 - 0014a000, lowest used address 0014961c, stack used: 2532 bytes
CPU1: stack: 00148000 - 00149000, lowest used address 00148d00, stack used: 768 bytes
CPU2: stack: 00147000 - 00148000, lowest used address 00147d00, stack used: 768 bytes
CPU3: stack: 00146000 - 00147000, lowest used address 00146d00, stack used: 768 bytes
CPU_CLUSTER: 0 init finished in 37672 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 0 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 0 usecs
PCI: 00:01.0 init ...
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'pci1002,9903.rom'
CBFS: Found @ offset 71640 size f200
In CBFS, ROM address for PCI: 00:01.0 = ffc71788
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9903,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffc71788 to 0xc0000, 0xf200 bytes
VGA Option ROM was run
PCI: 00:01.0 init finished in 328836 usecs
PCI: 00:01.1 init ...
PCI: 00:01.1 init finished in 0 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 0 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 0 usecs
PCI: 00:12.2 init ...
PCI: 00:12.2 init finished in 0 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 0 usecs
PCI: 00:13.2 init ...
PCI: 00:13.2 init finished in 0 usecs
PCI: 00:14.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
  reg 0x0000: 0x04000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init finished in 23 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 1 usecs
PCI: 00:14.3 init ...
RTC Init
PCI: 00:14.3 init finished in 26 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 1 usecs
PCI: 00:16.0 init ...
PCI: 00:16.0 init finished in 1 usecs
PCI: 00:16.2 init ...
PCI: 00:16.2 init finished in 1 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 1 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 1 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 1 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 1 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 1 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 1 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 1 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 1 usecs
PNP: 00ff.0 init ...
Compal ENE932: Initializing keyboard.
PNP: 00ff.0 init finished in 1 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 10: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:10.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 00ff.1: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
PNP: 00ff.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 366614 exit 0
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
Moving GDT to bfffea00...ok
Finalize devices...
Devices finalized
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
agesawrapper_amdinitlate() returned AGESA_SUCCESS
BS: BS_POST_DEVICE times (us): entry 193 run 1 exit 132
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 1
Wrote the mp table end at: 000f0010 - 000f0244
Wrote the mp table end at: bffd3010 - bffd3244
MP table: 580 bytes.
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 1c5c0 size 2345
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bffaf000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * TCPA
TCPA log created at bff9f000
ACPI: added table 3/32, length now 48
ACPI:    * MADT
ACPI: added table 4/32, length now 52
current = bffb1820
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'pci1002,9903.rom'
CBFS: Found @ offset 71640 size f200
In CBFS, ROM address for PCI: 00:01.0 = ffc71788
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 9903,
PCI ROM image, Class Code 030000, Code Type 00
ACPI:    * VFCT at bffb1820
           Copying initialized VBIOS image from 000c0000
ACPI: added table 5/32, length now 56
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: added table 7/32, length now 64
ACPI:    * IVRS at bffc0ca0
ACPI: added table 8/32, length now 68
ACPI:    * SRAT at bffc0d10
  AGESA SRAT table NULL. Skipping.
ACPI:   * SLIT at bffc0d10
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at bffc0d10
ACPI: added table 9/32, length now 72
ACPI:    * SSDT at bffc2bf0
ACPI: added table 10/32, length now 76
ACPI:    * SSDT for PState at bffc378c
ACPI: done.
ACPI tables: 83856 bytes.
smbios_write_tables: bff9e000
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
Root Device (LENOVO LENOVO G505S)
CPU_CLUSTER: 0 (AMD Family 15rl Root Complex)
APIC: 10 (AMD CPU Family 15h Model 10h-1Fh)
DOMAIN: 0000 (AMD Family 15rl Root Complex)
PCI: 00:00.0 (AMD FAM15 Northbridge)
PCI: 00:00.2 (AMD FAM15 Northbridge)
PCI: 00:01.0 (AMD FAM15 Northbridge)
PCI: 00:01.1 (AMD FAM15 Northbridge)
PCI: 00:02.0 (AMD FAM15 Northbridge)
PCI: 00:03.0 (AMD FAM15 Northbridge)
PCI: 00:04.0 (AMD FAM15 Northbridge)
PCI: 00:05.0 (AMD FAM15 Northbridge)
PCI: 00:06.0 (AMD FAM15 Northbridge)
PCI: 00:07.0 (AMD FAM15 Northbridge)
PCI: 00:08.0 (AMD FAM15 Northbridge)
PCI: 00:09.0 (AMD FAM15 Northbridge)
PCI: 00:10.0 (ATI HUDSON)
PCI: 00:11.0 (ATI HUDSON)
PCI: 00:12.0 (ATI HUDSON)
PCI: 00:12.2 (ATI HUDSON)
PCI: 00:13.0 (ATI HUDSON)
PCI: 00:13.2 (ATI HUDSON)
PCI: 00:14.0 (ATI HUDSON)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
PCI: 00:14.2 (ATI HUDSON)
PCI: 00:14.3 (ATI HUDSON)
PNP: 00ff.1 (COMPAL ENE932 EC)
PCI: 00:14.4 (ATI HUDSON)
PCI: 00:14.5 (ATI HUDSON)
PCI: 00:14.6 (ATI HUDSON)
PCI: 00:14.7 (ATI HUDSON)
PCI: 00:15.0 (ATI HUDSON)
PCI: 00:15.1 (ATI HUDSON)
PCI: 00:15.2 (ATI HUDSON)
PCI: 00:15.3 (ATI HUDSON)
PCI: 00:18.0 (AMD FAM15 Northbridge)
PCI: 00:18.1 (AMD FAM15 Northbridge)
PCI: 00:18.2 (AMD FAM15 Northbridge)
PCI: 00:18.3 (AMD FAM15 Northbridge)
PCI: 00:18.4 (AMD FAM15 Northbridge)
PCI: 00:18.5 (AMD FAM15 Northbridge)
APIC: 11 (unknown)
APIC: 12 (unknown)
APIC: 13 (unknown)
PCI: 00:16.0 (unknown)
PCI: 00:16.2 (unknown)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
PNP: 00ff.0 (unknown)
SMBIOS tables: 333 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum ffe0
Writing coreboot table at 0xbffd4000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-00000000bff9dfff: RAM
 3. 00000000bff9e000-00000000bfffffff: CONFIGURATION TABLES
 4. 00000000c0000000-00000000dfffffff: RESERVED
 5. 00000000f8000000-00000000fbffffff: RESERVED
 6. 0000000100000000-000000021effffff: RAM
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffc00000 size = 400000 #areas = 3
Wrote coreboot table at: bffd4000, 0x250 bytes, checksum b226
coreboot table: 616 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CONSOLE     2. bffde000 00020000
TIME STAMP  3. bffdd000 00000400
AGESA RSVD  4. bffdc000 00001000
COREBOOT    5. bffd4000 00008000
SMP TABLE   6. bffd3000 00001000
ACPI        7. bffaf000 00024000
TCPA LOG    8. bff9f000 00010000
SMBIOS      9. bff9e000 00000800
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  GDT         1. bfffea00 00000200
BS: BS_WRITE_TABLES times (us): entry 0 run 2122 exit 0
CBFS: 'Master Header Locator' located CBFS at [100:3fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 808c0 size f65f
Loading segment from ROM address 0xffc809f8
  code (compression=1)
  New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xffc80a30 filesize 0xf627
Loading segment from ROM address 0xffc80a14
  Entry Point 0x000ff06e
Bounce Buffer at bfd20000, 2612064 bytes
Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627
lb: [0x0000000000100000, 0x000000000023edb0)
Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627
using LZMA
[ 0x000e31c0, 00100000, 0x00100000) <- ffc80a30
dest 000e31c0, end 00100000, bouncebuffer bfd20000
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 14653 exit 0
Jumping to boot code at 000ff06e(bffd4000)
CPU0: stack: 00149000 - 0014a000, lowest used address 0014961c, stack used: 2532 bytes
entry    = 0x000ff06e
lb_start = 0x00100000
lb_size  = 0x0013edb0
buffer   = 0xbfd20000
SeaBIOS (version rel-1.10.2-0-g5f4c7b1)
BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ bffde000
Found mainboard LENOVO LENOVO G505S
Relocating init from 0x000e4740 to 0xbff51da0 (size 49600)
Found CBFS header at 0xffc00138
multiboot: eax=0, ebx=0
Found 25 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xbff9e000 to 0x000f08e0
Copying ACPI RSDP from 0xbffaf000 to 0x000f08b0
Copying MPTABLE from 0xbffd3000/bffd3010 to 0x000f0660
Using pmtimer, ioport 0x818
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.2-0-g5f4c7b1)
EHCI init on dev 00:12.2 (regs=0xf02cc020)
EHCI init on dev 00:13.2 (regs=0xf02cd020)
EHCI init on dev 00:16.2 (regs=0xf02ce020)
OHCI init on dev 00:12.0 (regs=0xf02c8000)
OHCI init on dev 00:13.0 (regs=0xf02c9000)
OHCI init on dev 00:16.0 (regs=0xf02ca000)
AHCI controller at 00:11.0, iobase 0xf02cb000, irq 0
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0
AHCI/1: registering: "DVD/CD [AHCI/1: TSSTcorp CDDVDW SU-208DB ATAPI-8 DVD/CD]"
PS2 keyboard initialized
Searching bootorder for: /pci@i0cf8/usb@16,2/storage@2/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@16,2/usb-*@2
USB MSC vendor='JetFlash' product='TS4GJF2A/120' rev='0.00' type=0 removable=1
USB MSC blksize=512 sectors=8028160
All threads complete.
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: HALT
drive 0x000f05c0: PCHS=0/0/0 translation=lba LCHS=995/128/63 s=8028160
Space available for UMB: cf800-ee800, f0000-f0590
Returned 245760 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000bff9a000 = 1 RAM
  4: 00000000bff9a000 - 00000000e0000000 = 2 RESERVED
  5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  6: 0000000100000000 - 000000021f000000 = 1 RAM
enter handle_19:
  NULL
Booting from DVD/CD...
Device reports MEDIUM NOT PRESENT
scsi_is_ready returned -1
Boot failed: Could not read from CDROM (code 0003)
enter handle_18:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00