Michael Gerlach | d46ebfb | 2015-05-27 03:02:55 +0200 | [diff] [blame] | 1 | coreboot.rom: 8192 kB, bootblocksize 1968, romsize 8388608, offset 0x700000 |
| 2 | alignment: 64 bytes, architecture: x86 |
| 3 | |
| 4 | Name Offset Type Size |
| 5 | cmos.default 0x700000 cmos_default 256 |
| 6 | cmos_layout.bin 0x700140 cmos_layout 1720 |
| 7 | pci8086,0046.rom 0x700840 optionrom 65536 |
| 8 | cpu_microcode_blob.bin 0x710880 microcode 11264 |
| 9 | config 0x713500 raw 5007 |
| 10 | revision 0x7148c0 raw 570 |
| 11 | (empty) 0x714b40 null 46104 |
| 12 | fallback/romstage 0x71ff80 stage 62572 |
| 13 | fallback/ramstage 0x72f480 stage 73523 |
| 14 | fallback/payload 0x741400 payload 55100 |
| 15 | pci8086,10ea.rom 0x74eb80 raw 61952 |
| 16 | bootsplash.jpg 0x75ddc0 raw 59966 |
| 17 | (empty) 0x76c840 null 472920 |
| 18 | mrc.cache 0x7dffc0 mrc_cache 65536 |
| 19 | (empty) 0x7f0000 null 63448 |