Sevan Janiyan | 98c5c1a | 2014-08-16 00:01:43 +0100 | [diff] [blame] | 1 | coreboot-4.0-6723-ga0a3727 Fri Aug 15 21:16:16 BST 2014 booting... |
| 2 | clocks_per_usec: 499 |
| 3 | BS: BS_PRE_DEVICE times (us): entry 0 run 3 exit 0 |
| 4 | BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| 5 | Enumerating buses... |
| 6 | Show all devs...Before device enumeration. |
| 7 | Root Device: enabled 1 |
| 8 | DOMAIN: 0000: enabled 1 |
| 9 | PCI: 00:01.0: enabled 1 |
| 10 | PCI: 00:01.1: enabled 1 |
| 11 | PCI: 00:0f.0: enabled 1 |
| 12 | PCI: 00:0f.1: enabled 1 |
| 13 | PCI: 00:0f.2: enabled 1 |
| 14 | PCI: 00:0f.4: enabled 1 |
| 15 | PCI: 00:0f.5: enabled 1 |
| 16 | CPU_CLUSTER: 0: enabled 1 |
| 17 | APIC: 00: enabled 1 |
| 18 | Compare with tree... |
| 19 | Root Device: enabled 1 |
| 20 | DOMAIN: 0000: enabled 1 |
| 21 | PCI: 00:01.0: enabled 1 |
| 22 | PCI: 00:01.1: enabled 1 |
| 23 | PCI: 00:0f.0: enabled 1 |
| 24 | PCI: 00:0f.1: enabled 1 |
| 25 | PCI: 00:0f.2: enabled 1 |
| 26 | PCI: 00:0f.4: enabled 1 |
| 27 | PCI: 00:0f.5: enabled 1 |
| 28 | CPU_CLUSTER: 0: enabled 1 |
| 29 | APIC: 00: enabled 1 |
| 30 | scan_static_bus for Root Device |
| 31 | >> Entering northbridge.c: enable_dev with path 6 |
| 32 | >> Entering northbridge.c: pci_domain_enable |
| 33 | Enter northbridge_init_early |
| 34 | writeglmsr: MSR 0x10000020, val 0x20000000:0x000fff80 |
| 35 | writeglmsr: MSR 0x10000021, val 0x20000000:0x080fffe0 |
| 36 | sizeram: _MSR MC_CF07_DATA: 10076013:00061a40 |
| 37 | sizeram: sizem 0x100MB |
| 38 | SysmemInit: enable for 256MBytes |
| 39 | usable RAM: 268304383 bytes |
| 40 | SysmemInit: MSR 0x10000028, val 0x2000000f:0xfdf00100 |
| 41 | sizeram: _MSR MC_CF07_DATA: 10076013:00061a40 |
| 42 | sizeram: sizem 0x100MB |
| 43 | SMMGL0Init: 268304384 bytes |
| 44 | SMMGL0Init: offset is 0x80400000 |
| 45 | SMMGL0Init: MSR 0x10000026, val 0x28fbe080:0x400fffe0 |
| 46 | writeglmsr: MSR 0x10000080, val 0x00000000:0x00000003 |
| 47 | writeglmsr: MSR 0x40000020, val 0x20000000:0x000fff80 |
| 48 | writeglmsr: MSR 0x40000021, val 0x20000000:0x080fffe0 |
| 49 | sizeram: _MSR MC_CF07_DATA: 10076013:00061a40 |
| 50 | sizeram: sizem 0x100MB |
| 51 | SysmemInit: enable for 256MBytes |
| 52 | usable RAM: 268304383 bytes |
| 53 | SysmemInit: MSR 0x4000002a, val 0x2000000f:0xfdf00100 |
| 54 | SMMGL1Init: |
| 55 | SMMGL1Init: MSR 0x40000023, val 0x20000080:0x400fffe0 |
| 56 | writeglmsr: MSR 0x40000080, val 0x00000000:0x00000001 |
| 57 | writeglmsr: MSR 0x400000e3, val 0x60000000:0x033000f0 |
| 58 | CPU_RCONF_DEFAULT (1808): 0x25FFFC02:0x10FFDF00 |
| 59 | CPU_RCONF_BYPASS (180A): 0x00000000 : 0x00000000 |
| 60 | L2 cache enabled |
| 61 | Enabling cache |
| 62 | GLPCI R1: system msr.lo 0x00100130 msr.hi 0x0ffdf000 |
| 63 | GLPCI R2: system msr.lo 0x80400120 msr.hi 0x8041f000 |
| 64 | Exit northbridge_init_early |
| 65 | Done cpubug fixes |
| 66 | Not Doing ChipsetFlashSetup() |
| 67 | Preparing for VSA... |
| 68 | Real mode stub @00000600: 867 bytes |
| 69 | CBFS: loading stage vsa @ 0x60000 (57504 bytes), entry @ 0x60020 |
| 70 | VSA: Buffer @00060000 *[0k]=ba |
| 71 | VSA: Signature *[0x20-0x23] is b0:10:e6:80 |
| 72 | Calling VSA module... |
| 73 | ... VSA module returned. |
| 74 | VSM: VSA2 VR signature verified. |
| 75 | Graphics init... |
| 76 | VRC_VG value: 0x2808 |
| 77 | DOMAIN: 0000 enabled |
| 78 | >> Entering northbridge.c: enable_dev with path 7 |
| 79 | CPU_CLUSTER: 0 enabled |
| 80 | DOMAIN: 0000 scanning... |
| 81 | PCI: pci_scan_bus for bus 00 |
| 82 | >> Entering northbridge.c: enable_dev with path 2 |
| 83 | PCI: 00:01.0 [1022/2080] ops |
| 84 | PCI: 00:01.0 [1022/2080] enabled |
| 85 | >> Entering northbridge.c: enable_dev with path 2 |
| 86 | PCI: 00:01.1 [1022/2081] enabled |
| 87 | PCI: 00:01.2 [1022/2082] enabled |
| 88 | PCI: 00:09.0 [1106/3053] enabled |
| 89 | PCI: 00:0a.0 [1106/3053] enabled |
| 90 | PCI: 00:0b.0 [1106/3053] enabled |
| 91 | PCI: 00:0c.0 [168c/1014] enabled |
| 92 | cs5536: southbridge_enable: dev is 00117794 |
| 93 | PCI: 00:0f.0 [1022/2090] bus ops |
| 94 | PCI: 00:0f.0 [1022/2090] enabled |
| 95 | cs5536: southbridge_enable: dev is 0011782c |
| 96 | PCI: Static device PCI: 00:0f.1 not found, disabling it. |
| 97 | cs5536: southbridge_enable: dev is 001178c4 |
| 98 | PCI: 00:0f.2 [1022/209a] ops |
| 99 | PCI: 00:0f.2 [1022/209a] enabled |
| 100 | PCI: 00:0f.3 [1022/2093] enabled |
| 101 | cs5536: southbridge_enable: dev is 0011795c |
| 102 | PCI: 00:0f.4 [1022/2094] enabled |
| 103 | cs5536: southbridge_enable: dev is 001179f4 |
| 104 | PCI: 00:0f.5 [1022/2095] enabled |
| 105 | PCI: 00:0f.6 [1022/2096] enabled |
| 106 | PCI: 00:0f.7 [1022/2097] enabled |
| 107 | scan_static_bus for PCI: 00:0f.0 |
| 108 | scan_static_bus for PCI: 00:0f.0 done |
| 109 | PCI: pci_scan_bus returning with max=000 |
| 110 | scan_static_bus for Root Device done |
| 111 | done |
| 112 | BS: BS_DEV_ENUMERATE times (us): entry 0 run 1030829 exit 0 |
| 113 | found VGA at PCI: 00:01.1 |
| 114 | Setting up VGA for PCI: 00:01.1 |
| 115 | Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| 116 | Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| 117 | Allocating resources... |
| 118 | Reading resources... |
| 119 | Root Device read_resources bus 0 link: 0 |
| 120 | DOMAIN: 0000 read_resources bus 0 link: 0 |
| 121 | DOMAIN: 0000 read_resources bus 0 link: 0 done |
| 122 | CPU_CLUSTER: 0 read_resources bus 0 link: 0 |
| 123 | APIC: 00 missing read_resources |
| 124 | CPU_CLUSTER: 0 read_resources bus 0 link: 0 done |
| 125 | Root Device read_resources bus 0 link: 0 done |
| 126 | Done reading resources. |
| 127 | Show resources in subtree (Root Device)...After reading. |
| 128 | Root Device child on link 0 DOMAIN: 0000 |
| 129 | DOMAIN: 0000 child on link 0 PCI: 00:01.0 |
| 130 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 |
| 131 | DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 |
| 132 | PCI: 00:01.0 |
| 133 | PCI: 00:01.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 10 |
| 134 | PCI: 00:01.1 |
| 135 | PCI: 00:01.1 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10 |
| 136 | PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 14 |
| 137 | PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 18 |
| 138 | PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c |
| 139 | PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 20 |
| 140 | PCI: 00:01.2 |
| 141 | PCI: 00:01.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 |
| 142 | PCI: 00:09.0 |
| 143 | PCI: 00:09.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| 144 | PCI: 00:09.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14 |
| 145 | PCI: 00:0a.0 |
| 146 | PCI: 00:0a.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| 147 | PCI: 00:0a.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14 |
| 148 | PCI: 00:0b.0 |
| 149 | PCI: 00:0b.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 |
| 150 | PCI: 00:0b.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14 |
| 151 | PCI: 00:0c.0 |
| 152 | PCI: 00:0c.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 index 10 |
| 153 | PCI: 00:0f.0 |
| 154 | PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 |
| 155 | PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 |
| 156 | PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 18 |
| 157 | PCI: 00:0f.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 1c |
| 158 | PCI: 00:0f.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 20 |
| 159 | PCI: 00:0f.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 24 |
| 160 | PCI: 00:0f.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1 |
| 161 | PCI: 00:0f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 162 | PCI: 00:0f.1 |
| 163 | PCI: 00:0f.2 |
| 164 | PCI: 00:0f.2 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 |
| 165 | PCI: 00:0f.3 |
| 166 | PCI: 00:0f.3 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 10 |
| 167 | PCI: 00:0f.4 |
| 168 | PCI: 00:0f.4 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 169 | PCI: 00:0f.5 |
| 170 | PCI: 00:0f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 171 | PCI: 00:0f.6 |
| 172 | PCI: 00:0f.6 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10 |
| 173 | PCI: 00:0f.7 |
| 174 | PCI: 00:0f.7 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 |
| 175 | CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| 176 | APIC: 00 |
| 177 | DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| 178 | PCI: 00:09.0 10 * [0x0 - 0xff] io |
| 179 | PCI: 00:0a.0 10 * [0x400 - 0x4ff] io |
| 180 | PCI: 00:0b.0 10 * [0x800 - 0x8ff] io |
| 181 | PCI: 00:0f.0 14 * [0xc00 - 0xcff] io |
| 182 | PCI: 00:0f.0 20 * [0x1000 - 0x107f] io |
| 183 | PCI: 00:0f.3 10 * [0x1080 - 0x10ff] io |
| 184 | PCI: 00:0f.0 18 * [0x1400 - 0x143f] io |
| 185 | PCI: 00:0f.0 24 * [0x1440 - 0x147f] io |
| 186 | PCI: 00:0f.0 1c * [0x1480 - 0x149f] io |
| 187 | PCI: 00:0f.2 20 * [0x14a0 - 0x14af] io |
| 188 | PCI: 00:0f.0 10 * [0x14b0 - 0x14b7] io |
| 189 | PCI: 00:01.0 10 * [0x14b8 - 0x14bb] io |
| 190 | DOMAIN: 0000 compute_resources_io: base: 14bc size: 14bc align: 8 gran: 0 limit: ffff done |
| 191 | DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff |
| 192 | PCI: 00:01.1 10 * [0x0 - 0xffffff] mem |
| 193 | PCI: 00:0c.0 10 * [0x1000000 - 0x100ffff] mem |
| 194 | PCI: 00:01.1 14 * [0x1010000 - 0x1013fff] mem |
| 195 | PCI: 00:01.1 18 * [0x1014000 - 0x1017fff] mem |
| 196 | PCI: 00:01.1 1c * [0x1018000 - 0x101bfff] mem |
| 197 | PCI: 00:01.1 20 * [0x101c000 - 0x101ffff] mem |
| 198 | PCI: 00:01.2 10 * [0x1020000 - 0x1023fff] mem |
| 199 | PCI: 00:0f.6 10 * [0x1024000 - 0x1025fff] mem |
| 200 | PCI: 00:0f.4 10 * [0x1026000 - 0x1026fff] mem |
| 201 | PCI: 00:0f.5 10 * [0x1027000 - 0x1027fff] mem |
| 202 | PCI: 00:0f.7 10 * [0x1028000 - 0x1028fff] mem |
| 203 | PCI: 00:09.0 14 * [0x1029000 - 0x10290ff] mem |
| 204 | PCI: 00:0a.0 14 * [0x1029100 - 0x10291ff] mem |
| 205 | PCI: 00:0b.0 14 * [0x1029200 - 0x10292ff] mem |
| 206 | DOMAIN: 0000 compute_resources_mem: base: 1029300 size: 1029300 align: 24 gran: 0 limit: ffffffff done |
| 207 | avoid_fixed_resources: DOMAIN: 0000 |
| 208 | avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff |
| 209 | avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff |
| 210 | constrain_resources: DOMAIN: 0000 |
| 211 | constrain_resources: PCI: 00:01.0 |
| 212 | constrain_resources: PCI: 00:01.1 |
| 213 | constrain_resources: PCI: 00:01.2 |
| 214 | constrain_resources: PCI: 00:09.0 |
| 215 | constrain_resources: PCI: 00:0a.0 |
| 216 | constrain_resources: PCI: 00:0b.0 |
| 217 | constrain_resources: PCI: 00:0c.0 |
| 218 | constrain_resources: PCI: 00:0f.0 |
| 219 | constrain_resources: PCI: 00:0f.2 |
| 220 | constrain_resources: PCI: 00:0f.3 |
| 221 | constrain_resources: PCI: 00:0f.4 |
| 222 | constrain_resources: PCI: 00:0f.5 |
| 223 | constrain_resources: PCI: 00:0f.6 |
| 224 | constrain_resources: PCI: 00:0f.7 |
| 225 | avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff |
| 226 | lim->base 00001000 lim->limit 0000ffff |
| 227 | avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff |
| 228 | lim->base 00000000 lim->limit febfffff |
| 229 | Setting resources... |
| 230 | DOMAIN: 0000 allocate_resources_io: base:1000 size:14bc align:8 gran:0 limit:ffff |
| 231 | Assigned: PCI: 00:09.0 10 * [0x1000 - 0x10ff] io |
| 232 | Assigned: PCI: 00:0a.0 10 * [0x1400 - 0x14ff] io |
| 233 | Assigned: PCI: 00:0b.0 10 * [0x1800 - 0x18ff] io |
| 234 | Assigned: PCI: 00:0f.0 14 * [0x1c00 - 0x1cff] io |
| 235 | Assigned: PCI: 00:0f.0 20 * [0x2000 - 0x207f] io |
| 236 | Assigned: PCI: 00:0f.3 10 * [0x2080 - 0x20ff] io |
| 237 | Assigned: PCI: 00:0f.0 18 * [0x2400 - 0x243f] io |
| 238 | Assigned: PCI: 00:0f.0 24 * [0x2440 - 0x247f] io |
| 239 | Assigned: PCI: 00:0f.0 1c * [0x2480 - 0x249f] io |
| 240 | Assigned: PCI: 00:0f.2 20 * [0x24a0 - 0x24af] io |
| 241 | Assigned: PCI: 00:0f.0 10 * [0x24b0 - 0x24b7] io |
| 242 | Assigned: PCI: 00:01.0 10 * [0x24b8 - 0x24bb] io |
| 243 | DOMAIN: 0000 allocate_resources_io: next_base: 24bc size: 14bc align: 8 gran: 0 done |
| 244 | DOMAIN: 0000 allocate_resources_mem: base:fd000000 size:1029300 align:24 gran:0 limit:febfffff |
| 245 | Assigned: PCI: 00:01.1 10 * [0xfd000000 - 0xfdffffff] mem |
| 246 | Assigned: PCI: 00:0c.0 10 * [0xfe000000 - 0xfe00ffff] mem |
| 247 | Assigned: PCI: 00:01.1 14 * [0xfe010000 - 0xfe013fff] mem |
| 248 | Assigned: PCI: 00:01.1 18 * [0xfe014000 - 0xfe017fff] mem |
| 249 | Assigned: PCI: 00:01.1 1c * [0xfe018000 - 0xfe01bfff] mem |
| 250 | Assigned: PCI: 00:01.1 20 * [0xfe01c000 - 0xfe01ffff] mem |
| 251 | Assigned: PCI: 00:01.2 10 * [0xfe020000 - 0xfe023fff] mem |
| 252 | Assigned: PCI: 00:0f.6 10 * [0xfe024000 - 0xfe025fff] mem |
| 253 | Assigned: PCI: 00:0f.4 10 * [0xfe026000 - 0xfe026fff] mem |
| 254 | Assigned: PCI: 00:0f.5 10 * [0xfe027000 - 0xfe027fff] mem |
| 255 | Assigned: PCI: 00:0f.7 10 * [0xfe028000 - 0xfe028fff] mem |
| 256 | Assigned: PCI: 00:09.0 14 * [0xfe029000 - 0xfe0290ff] mem |
| 257 | Assigned: PCI: 00:0a.0 14 * [0xfe029100 - 0xfe0291ff] mem |
| 258 | Assigned: PCI: 00:0b.0 14 * [0xfe029200 - 0xfe0292ff] mem |
| 259 | DOMAIN: 0000 allocate_resources_mem: next_base: fe029300 size: 1029300 align: 24 gran: 0 done |
| 260 | Root Device assign_resources, bus 0 link: 0 |
| 261 | >> Entering northbridge.c: pci_domain_set_resources |
| 262 | CBMEM region f7b0000-f7dffff (cbmem_late_set_table) |
| 263 | DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| 264 | PCI: 00:01.1 10 <- [0x00fd000000 - 0x00fdffffff] size 0x01000000 gran 0x18 mem |
| 265 | PCI: 00:01.1 14 <- [0x00fe010000 - 0x00fe013fff] size 0x00004000 gran 0x0e mem |
| 266 | PCI: 00:01.1 18 <- [0x00fe014000 - 0x00fe017fff] size 0x00004000 gran 0x0e mem |
| 267 | PCI: 00:01.1 1c <- [0x00fe018000 - 0x00fe01bfff] size 0x00004000 gran 0x0e mem |
| 268 | PCI: 00:01.1 20 <- [0x00fe01c000 - 0x00fe01ffff] size 0x00004000 gran 0x0e mem |
| 269 | PCI: 00:01.2 10 <- [0x00fe020000 - 0x00fe023fff] size 0x00004000 gran 0x0e mem |
| 270 | PCI: 00:09.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io |
| 271 | PCI: 00:09.0 14 <- [0x00fe029000 - 0x00fe0290ff] size 0x00000100 gran 0x08 mem |
| 272 | PCI: 00:0a.0 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io |
| 273 | PCI: 00:0a.0 14 <- [0x00fe029100 - 0x00fe0291ff] size 0x00000100 gran 0x08 mem |
| 274 | PCI: 00:0b.0 10 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io |
| 275 | PCI: 00:0b.0 14 <- [0x00fe029200 - 0x00fe0292ff] size 0x00000100 gran 0x08 mem |
| 276 | PCI: 00:0c.0 10 <- [0x00fe000000 - 0x00fe00ffff] size 0x00010000 gran 0x10 mem |
| 277 | PCI: 00:0f.0 10 <- [0x00000024b0 - 0x00000024b7] size 0x00000008 gran 0x03 io |
| 278 | PCI: 00:0f.0 14 <- [0x0000001c00 - 0x0000001cff] size 0x00000100 gran 0x08 io |
| 279 | PCI: 00:0f.0 18 <- [0x0000002400 - 0x000000243f] size 0x00000040 gran 0x06 io |
| 280 | PCI: 00:0f.0 1c <- [0x0000002480 - 0x000000249f] size 0x00000020 gran 0x05 io |
| 281 | PCI: 00:0f.0 20 <- [0x0000002000 - 0x000000207f] size 0x00000080 gran 0x07 io |
| 282 | PCI: 00:0f.0 24 <- [0x0000002440 - 0x000000247f] size 0x00000040 gran 0x06 io |
| 283 | PCI: 00:0f.2 20 <- [0x00000024a0 - 0x00000024af] size 0x00000010 gran 0x04 io |
| 284 | PCI: 00:0f.3 10 <- [0x0000002080 - 0x00000020ff] size 0x00000080 gran 0x07 io |
| 285 | PCI: 00:0f.4 10 <- [0x00fe026000 - 0x00fe026fff] size 0x00001000 gran 0x0c mem |
| 286 | PCI: 00:0f.5 10 <- [0x00fe027000 - 0x00fe027fff] size 0x00001000 gran 0x0c mem |
| 287 | PCI: 00:0f.6 10 <- [0x00fe024000 - 0x00fe025fff] size 0x00002000 gran 0x0d mem |
| 288 | PCI: 00:0f.7 10 <- [0x00fe028000 - 0x00fe028fff] size 0x00001000 gran 0x0c mem |
| 289 | DOMAIN: 0000 assign_resources, bus 0 link: 0 |
| 290 | Root Device assign_resources, bus 0 link: 0 |
| 291 | Done setting resources. |
| 292 | Show resources in subtree (Root Device)...After assigning values. |
| 293 | Root Device child on link 0 DOMAIN: 0000 |
| 294 | DOMAIN: 0000 child on link 0 PCI: 00:01.0 |
| 295 | DOMAIN: 0000 resource base 1000 size 14bc align 8 gran 0 limit ffff flags 40040100 index 10000000 |
| 296 | DOMAIN: 0000 resource base fd000000 size 1029300 align 24 gran 0 limit febfffff flags 40040200 index 10000100 |
| 297 | DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a |
| 298 | DOMAIN: 0000 resource base c0000 size f720000 align 0 gran 0 limit 0 flags e0004200 index b |
| 299 | PCI: 00:01.0 |
| 300 | PCI: 00:01.0 resource base 24b8 size 4 align 2 gran 2 limit ffff flags 40000100 index 10 |
| 301 | PCI: 00:01.1 |
| 302 | PCI: 00:01.1 resource base fd000000 size 1000000 align 24 gran 24 limit febfffff flags 60000200 index 10 |
| 303 | PCI: 00:01.1 resource base fe010000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 14 |
| 304 | PCI: 00:01.1 resource base fe014000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 18 |
| 305 | PCI: 00:01.1 resource base fe018000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 1c |
| 306 | PCI: 00:01.1 resource base fe01c000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 20 |
| 307 | PCI: 00:01.2 |
| 308 | PCI: 00:01.2 resource base fe020000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 10 |
| 309 | PCI: 00:09.0 |
| 310 | PCI: 00:09.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 |
| 311 | PCI: 00:09.0 resource base fe029000 size 100 align 8 gran 8 limit febfffff flags 60000200 index 14 |
| 312 | PCI: 00:0a.0 |
| 313 | PCI: 00:0a.0 resource base 1400 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 |
| 314 | PCI: 00:0a.0 resource base fe029100 size 100 align 8 gran 8 limit febfffff flags 60000200 index 14 |
| 315 | PCI: 00:0b.0 |
| 316 | PCI: 00:0b.0 resource base 1800 size 100 align 8 gran 8 limit ffff flags 60000100 index 10 |
| 317 | PCI: 00:0b.0 resource base fe029200 size 100 align 8 gran 8 limit febfffff flags 60000200 index 14 |
| 318 | PCI: 00:0c.0 |
| 319 | PCI: 00:0c.0 resource base fe000000 size 10000 align 16 gran 16 limit febfffff flags 60000200 index 10 |
| 320 | PCI: 00:0f.0 |
| 321 | PCI: 00:0f.0 resource base 24b0 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 |
| 322 | PCI: 00:0f.0 resource base 1c00 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 |
| 323 | PCI: 00:0f.0 resource base 2400 size 40 align 6 gran 6 limit ffff flags 60000100 index 18 |
| 324 | PCI: 00:0f.0 resource base 2480 size 20 align 5 gran 5 limit ffff flags 60000100 index 1c |
| 325 | PCI: 00:0f.0 resource base 2000 size 80 align 7 gran 7 limit ffff flags 60000100 index 20 |
| 326 | PCI: 00:0f.0 resource base 2440 size 40 align 6 gran 6 limit ffff flags 60000100 index 24 |
| 327 | PCI: 00:0f.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1 |
| 328 | PCI: 00:0f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 |
| 329 | PCI: 00:0f.1 |
| 330 | PCI: 00:0f.2 |
| 331 | PCI: 00:0f.2 resource base 24a0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 |
| 332 | PCI: 00:0f.3 |
| 333 | PCI: 00:0f.3 resource base 2080 size 80 align 7 gran 7 limit ffff flags 60000100 index 10 |
| 334 | PCI: 00:0f.4 |
| 335 | PCI: 00:0f.4 resource base fe026000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10 |
| 336 | PCI: 00:0f.5 |
| 337 | PCI: 00:0f.5 resource base fe027000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10 |
| 338 | PCI: 00:0f.6 |
| 339 | PCI: 00:0f.6 resource base fe024000 size 2000 align 13 gran 13 limit febfffff flags 60000200 index 10 |
| 340 | PCI: 00:0f.7 |
| 341 | PCI: 00:0f.7 resource base fe028000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10 |
| 342 | CPU_CLUSTER: 0 child on link 0 APIC: 00 |
| 343 | APIC: 00 |
| 344 | Done allocating resources. |
| 345 | BS: BS_DEV_RESOURCES times (us): entry 0 run 3640848 exit 0 |
| 346 | Enabling resources... |
| 347 | PCI: 00:01.0 cmd <- 05 |
| 348 | PCI: 00:01.1 subsystem <- 0000/0000 |
| 349 | PCI: 00:01.1 cmd <- 03 |
| 350 | PCI: 00:01.2 cmd <- 02 |
| 351 | PCI: 00:09.0 cmd <- 83 |
| 352 | PCI: 00:0a.0 cmd <- 83 |
| 353 | PCI: 00:0b.0 cmd <- 83 |
| 354 | PCI: 00:0c.0 cmd <- 02 |
| 355 | PCI: 00:0f.0 cmd <- 09 |
| 356 | PCI: 00:0f.2 cmd <- 01 |
| 357 | PCI: 00:0f.3 cmd <- 01 |
| 358 | PCI: 00:0f.4 subsystem <- 0000/0000 |
| 359 | PCI: 00:0f.4 cmd <- 02 |
| 360 | PCI: 00:0f.5 subsystem <- 0000/0000 |
| 361 | PCI: 00:0f.5 cmd <- 02 |
| 362 | PCI: 00:0f.6 cmd <- 02 |
| 363 | PCI: 00:0f.7 cmd <- 02 |
| 364 | done. |
| 365 | BS: BS_DEV_ENABLE times (us): entry 0 run 124954 exit 0 |
| 366 | Initializing devices... |
| 367 | Root Device init |
| 368 | ALIX.2D ENTER init |
| 369 | ALIX.2D EXIT init |
| 370 | Root Device init 14886 usecs |
| 371 | CPU_CLUSTER: 0 init |
| 372 | >> Entering northbridge.c: cpu_bus_init |
| 373 | Initializing CPU #0 |
| 374 | CPU: vendor AMD device 5a2 |
| 375 | CPU: family 05, model 0a, stepping 02 |
| 376 | geode_lx_init |
| 377 | Enabling cache |
| 378 | A20 (0x92): 2 |
| 379 | A20 (0x92): 2 |
| 380 | CPU geode_lx_init DONE |
| 381 | CPU #0 initialized |
| 382 | CPU_CLUSTER: 0 init 66547 usecs |
| 383 | PCI: 00:01.0 init |
| 384 | >> Entering northbridge.c: northbridge_init |
| 385 | PCI: 00:01.0 init 16680 usecs |
| 386 | PCI: 00:01.1 init |
| 387 | PCI: 00:01.1 init 4979 usecs |
| 388 | PCI: 00:01.2 init |
| 389 | PCI: 00:01.2 init 4979 usecs |
| 390 | PCI: 00:09.0 init |
| 391 | PCI: 00:09.0 init 4979 usecs |
| 392 | PCI: 00:0a.0 init |
| 393 | PCI: 00:0a.0 init 4979 usecs |
| 394 | PCI: 00:0b.0 init |
| 395 | PCI: 00:0b.0 init 4979 usecs |
| 396 | PCI: 00:0c.0 init |
| 397 | PCI: 00:0c.0 init 4980 usecs |
| 398 | PCI: 00:0f.0 init |
| 399 | cs5536: southbridge_init |
| 400 | RTC Init |
| 401 | GPIO_ADDR: 00001C00 |
| 402 | uarts_init: enable COM1 |
| 403 | uarts_init: enable COM2 |
| 404 | uarts_init: wrote COM2 address 0x2f8 |
| 405 | uarts_init: set COM2 irq |
| 406 | uarts_init: set output enable |
| 407 | uarts_init: set OUTAUX1 |
| 408 | uarts_init: set pullup COM2 |
| 409 | uarts_init: COM2 enabled |
| 410 | cs5536: southbridge_init: enable_ide_nand_flash is 0 |
| 411 | Disabling VPCI device: 0x80000900 |
| 412 | Disabling VPCI device: 0x80007B00 |
| 413 | PCI: 00:0f.0 init 111276 usecs |
| 414 | PCI: 00:0f.2 init |
| 415 | cs5536_ide: ide_init |
| 416 | PCI: 00:0f.2 init 10762 usecs |
| 417 | PCI: 00:0f.3 init |
| 418 | PCI: 00:0f.3 init 4980 usecs |
| 419 | PCI: 00:0f.4 init |
| 420 | PCI: 00:0f.4 init 4979 usecs |
| 421 | PCI: 00:0f.5 init |
| 422 | PCI: 00:0f.5 init 4979 usecs |
| 423 | PCI: 00:0f.6 init |
| 424 | PCI: 00:0f.6 init 4979 usecs |
| 425 | PCI: 00:0f.7 init |
| 426 | PCI: 00:0f.7 init 4979 usecs |
| 427 | Devices initialized |
| 428 | Show all devs...After init. |
| 429 | Root Device: enabled 1 |
| 430 | DOMAIN: 0000: enabled 1 |
| 431 | PCI: 00:01.0: enabled 1 |
| 432 | PCI: 00:01.1: enabled 1 |
| 433 | PCI: 00:0f.0: enabled 1 |
| 434 | PCI: 00:0f.1: enabled 0 |
| 435 | PCI: 00:0f.2: enabled 1 |
| 436 | PCI: 00:0f.4: enabled 1 |
| 437 | PCI: 00:0f.5: enabled 1 |
| 438 | CPU_CLUSTER: 0: enabled 1 |
| 439 | APIC: 00: enabled 1 |
| 440 | PCI: 00:01.2: enabled 1 |
| 441 | PCI: 00:09.0: enabled 1 |
| 442 | PCI: 00:0a.0: enabled 1 |
| 443 | PCI: 00:0b.0: enabled 1 |
| 444 | PCI: 00:0c.0: enabled 1 |
| 445 | PCI: 00:0f.3: enabled 1 |
| 446 | PCI: 00:0f.6: enabled 1 |
| 447 | PCI: 00:0f.7: enabled 1 |
| 448 | CPU: 00: enabled 1 |
| 449 | BS: BS_DEV_INIT times (us): entry 0 run 549514 exit 0 |
| 450 | CBMEM region f7b0000-f7dffff (cbmem_check_toc) |
| 451 | CBMEM region f7b0000-f7dffff (cbmem_initialize_empty) |
| 452 | Adding CBMEM entry as no. 1 |
| 453 | Moving GDT to 0f7b0200...ok |
| 454 | Adding CBMEM entry as no. 2 |
| 455 | Finalize devices... |
| 456 | Devices finalized |
| 457 | Adding CBMEM entry as no. 3 |
| 458 | BS: BS_POST_DEVICE times (us): entry 49577 run 17986 exit 0 |
| 459 | BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| 460 | Copying Interrupt Routing Table to 0x000f0000... done. |
| 461 | PIRQ Entry 0 Dev/Fn: 1 Slot: 0 |
| 462 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 463 | INT: B link: 0 bitmap: 0 not routed |
| 464 | INT: C link: 0 bitmap: 0 not routed |
| 465 | INT: D link: 0 bitmap: 0 not routed |
| 466 | Assigning IRQ 11 to 0:1.2 |
| 467 | PIRQ Entry 1 Dev/Fn: 9 Slot: 0 |
| 468 | INT: A link: 2 bitmap: 400 IRQ: 10 |
| 469 | INT: B link: 0 bitmap: 0 not routed |
| 470 | INT: C link: 0 bitmap: 0 not routed |
| 471 | INT: D link: 0 bitmap: 0 not routed |
| 472 | Assigning IRQ 10 to 0:9.0 |
| 473 | PIRQ Entry 2 Dev/Fn: A Slot: 0 |
| 474 | INT: A link: 3 bitmap: 800 IRQ: 11 |
| 475 | INT: B link: 0 bitmap: 0 not routed |
| 476 | INT: C link: 0 bitmap: 0 not routed |
| 477 | INT: D link: 0 bitmap: 0 not routed |
| 478 | Assigning IRQ 11 to 0:a.0 |
| 479 | PIRQ Entry 3 Dev/Fn: B Slot: 0 |
| 480 | INT: A link: 4 bitmap: 200 IRQ: 9 |
| 481 | INT: B link: 0 bitmap: 0 not routed |
| 482 | INT: C link: 0 bitmap: 0 not routed |
| 483 | INT: D link: 0 bitmap: 0 not routed |
| 484 | Assigning IRQ 9 to 0:b.0 |
| 485 | PIRQ Entry 4 Dev/Fn: C Slot: 0 |
| 486 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 487 | INT: B link: 2 bitmap: 400 IRQ: 10 |
| 488 | INT: C link: 0 bitmap: 0 not routed |
| 489 | INT: D link: 0 bitmap: 0 not routed |
| 490 | Assigning IRQ 11 to 0:c.0 |
| 491 | PIRQ Entry 5 Dev/Fn: E Slot: 0 |
| 492 | INT: A link: 3 bitmap: 800 IRQ: 11 |
| 493 | INT: B link: 4 bitmap: 200 IRQ: 9 |
| 494 | INT: C link: 0 bitmap: 0 not routed |
| 495 | INT: D link: 0 bitmap: 0 not routed |
| 496 | PIRQ Entry 6 Dev/Fn: F Slot: 0 |
| 497 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 498 | INT: B link: 2 bitmap: 400 IRQ: 10 |
| 499 | INT: C link: 3 bitmap: 800 IRQ: 11 |
| 500 | INT: D link: 4 bitmap: 200 IRQ: 9 |
| 501 | Assigning IRQ 9 to 0:f.4 |
| 502 | Assigning IRQ 9 to 0:f.5 |
| 503 | PIRQA: 11 |
| 504 | PIRQB: 10 |
| 505 | PIRQC: 11 |
| 506 | PIRQD: 9 |
| 507 | Adding CBMEM entry as no. 4 |
| 508 | Copying Interrupt Routing Table to 0x0f7c0600... done. |
| 509 | PIRQ Entry 0 Dev/Fn: 1 Slot: 0 |
| 510 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 511 | INT: B link: 0 bitmap: 0 not routed |
| 512 | INT: C link: 0 bitmap: 0 not routed |
| 513 | INT: D link: 0 bitmap: 0 not routed |
| 514 | Assigning IRQ 11 to 0:1.2 |
| 515 | PIRQ Entry 1 Dev/Fn: 9 Slot: 0 |
| 516 | INT: A link: 2 bitmap: 400 IRQ: 10 |
| 517 | INT: B link: 0 bitmap: 0 not routed |
| 518 | INT: C link: 0 bitmap: 0 not routed |
| 519 | INT: D link: 0 bitmap: 0 not routed |
| 520 | Assigning IRQ 10 to 0:9.0 |
| 521 | PIRQ Entry 2 Dev/Fn: A Slot: 0 |
| 522 | INT: A link: 3 bitmap: 800 IRQ: 11 |
| 523 | INT: B link: 0 bitmap: 0 not routed |
| 524 | INT: C link: 0 bitmap: 0 not routed |
| 525 | INT: D link: 0 bitmap: 0 not routed |
| 526 | Assigning IRQ 11 to 0:a.0 |
| 527 | PIRQ Entry 3 Dev/Fn: B Slot: 0 |
| 528 | INT: A link: 4 bitmap: 200 IRQ: 9 |
| 529 | INT: B link: 0 bitmap: 0 not routed |
| 530 | INT: C link: 0 bitmap: 0 not routed |
| 531 | INT: D link: 0 bitmap: 0 not routed |
| 532 | Assigning IRQ 9 to 0:b.0 |
| 533 | PIRQ Entry 4 Dev/Fn: C Slot: 0 |
| 534 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 535 | INT: B link: 2 bitmap: 400 IRQ: 10 |
| 536 | INT: C link: 0 bitmap: 0 not routed |
| 537 | INT: D link: 0 bitmap: 0 not routed |
| 538 | Assigning IRQ 11 to 0:c.0 |
| 539 | PIRQ Entry 5 Dev/Fn: E Slot: 0 |
| 540 | INT: A link: 3 bitmap: 800 IRQ: 11 |
| 541 | INT: B link: 4 bitmap: 200 IRQ: 9 |
| 542 | INT: C link: 0 bitmap: 0 not routed |
| 543 | INT: D link: 0 bitmap: 0 not routed |
| 544 | PIRQ Entry 6 Dev/Fn: F Slot: 0 |
| 545 | INT: A link: 1 bitmap: 800 IRQ: 11 |
| 546 | INT: B link: 2 bitmap: 400 IRQ: 10 |
| 547 | INT: C link: 3 bitmap: 800 IRQ: 11 |
| 548 | INT: D link: 4 bitmap: 200 IRQ: 9 |
| 549 | Assigning IRQ 9 to 0:f.4 |
| 550 | Assigning IRQ 9 to 0:f.5 |
| 551 | PIRQA: 11 |
| 552 | PIRQB: 10 |
| 553 | PIRQC: 11 |
| 554 | PIRQD: 9 |
| 555 | PIRQ table: 144 bytes. |
| 556 | Adding CBMEM entry as no. 5 |
| 557 | smbios_write_tables: 0f7c1600 |
| 558 | Root Device (PC Engines ALIX.2C) |
| 559 | DOMAIN: 0000 (AMD LX Northbridge) |
| 560 | PCI: 00:01.0 (AMD LX Northbridge) |
| 561 | PCI: 00:01.1 (AMD LX Northbridge) |
| 562 | PCI: 00:0f.0 (AMD Geode CS5536 Southbridge) |
| 563 | PCI: 00:0f.1 (AMD Geode CS5536 Southbridge) |
| 564 | PCI: 00:0f.2 (AMD Geode CS5536 Southbridge) |
| 565 | PCI: 00:0f.4 (AMD Geode CS5536 Southbridge) |
| 566 | PCI: 00:0f.5 (AMD Geode CS5536 Southbridge) |
| 567 | CPU_CLUSTER: 0 (AMD LX Northbridge) |
| 568 | APIC: 00 (unknown) |
| 569 | PCI: 00:01.2 (unknown) |
| 570 | PCI: 00:09.0 (unknown) |
| 571 | PCI: 00:0a.0 (unknown) |
| 572 | PCI: 00:0b.0 (unknown) |
| 573 | PCI: 00:0c.0 (unknown) |
| 574 | PCI: 00:0f.3 (unknown) |
| 575 | PCI: 00:0f.6 (unknown) |
| 576 | PCI: 00:0f.7 (unknown) |
| 577 | CPU: 00 (unknown) |
| 578 | SMBIOS tables: 348 bytes. |
| 579 | Adding CBMEM entry as no. 6 |
| 580 | Writing table forward entry at 0x00000500 |
| 581 | Wrote coreboot table at: 00000500, 0x10 bytes, checksum d262 |
| 582 | Table forward entry ends at 0x00000528. |
| 583 | ... aligned to 0x00001000 |
| 584 | Writing coreboot table at 0x0f7c1e00 |
| 585 | rom_table_end = 0x0f7c1e00 |
| 586 | ... aligned to 0x0f7d0000 |
| 587 | 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 588 | 1. 0000000000001000-000000000009ffff: RAM |
| 589 | 2. 00000000000c0000-000000000f7affff: RAM |
| 590 | 3. 000000000f7b0000-000000000f7dffff: CONFIGURATION TABLES |
| 591 | Wrote coreboot table at: 0f7c1e00, 0x158 bytes, checksum 5626 |
| 592 | coreboot table: 368 bytes. |
| 593 | FREE SPACE 0. 0f7c9e00 00016200 |
| 594 | GDT 1. 0f7b0200 00000200 |
| 595 | CONSOLE 2. 0f7b0400 00010000 |
| 596 | TIME STAMP 3. 0f7c0400 00000200 |
| 597 | IRQ TABLE 4. 0f7c0600 00001000 |
| 598 | SMBIOS 5. 0f7c1600 00000800 |
| 599 | COREBOOT 6. 0f7c1e00 00008000 |
| 600 | BS: BS_WRITE_TABLES times (us): entry 0 run 1232195 exit 0 |
| 601 | CBFS: located payload @ fff9fdb8, 52946 bytes. |
| 602 | Loading segment from rom address 0xfff9fdb8 |
| 603 | code (compression=1) |
| 604 | New segment dstaddr 0xe7170 memsize 0x18e90 srcaddr 0xfff9fdf0 filesize 0xce9a |
| 605 | (cleaned up) New segment addr 0xe7170 size 0x18e90 offset 0xfff9fdf0 filesize 0xce9a |
| 606 | Loading segment from rom address 0xfff9fdd4 |
| 607 | Entry Point 0x000fd53e |
| 608 | Bounce Buffer at 0f74a000, 417792 bytes |
| 609 | Loading Segment: addr: 0x00000000000e7170 memsz: 0x0000000000018e90 filesz: 0x000000000000ce9a |
| 610 | lb: [0x0000000000100000, 0x0000000000133000) |
| 611 | Post relocation: addr: 0x00000000000e7170 memsz: 0x0000000000018e90 filesz: 0x000000000000ce9a |
| 612 | using LZMA |
| 613 | [ 0x000e7170, 00100000, 0x00100000) <- fff9fdf0 |
| 614 | dest 000e7170, end 00100000, bouncebuffer f74a000 |
| 615 | Loaded segments |
| 616 | BS: BS_PAYLOAD_LOAD times (us): entry 0 run 306783 exit 0 |
| 617 | Jumping to boot code at 000fd53e |
| 618 | CPU0: stack: 0012e000 - 0012f000, lowest used address 0012eb2c, stack used: 1236 bytes |
| 619 | entry = 0x000fd53e |
| 620 | lb_start = 0x00100000 |
| 621 | lb_size = 0x00033000 |
| 622 | buffer = 0x0f74a000 |
| 623 | ----- [ SeaBIOS rel-1.7.4-0-g96917a8-20140815_211649-debian-vm ] ----- |
| 624 | Found coreboot cbmem console @ f7b0400 |
| 625 | Found mainboard PC Engines ALIX.2C |
| 626 | Relocating init from 0x000e81e9 to 0x0f796060 (size 40659) |
| 627 | Found CBFS header at 0xfffffcd0 |
| 628 | CPU Mhz=498 |
| 629 | Found 10 PCI devices (max PCI bus is 00) |
| 630 | Copying SMBIOS entry point from 0x0f7c1600 to 0x000f20a0 |
| 631 | Scan for VGA option rom |
| 632 | EHCI init on dev 00:0f.5 (regs=0xfe027010) |
| 633 | WARNING - Timeout at i8042_flush:71! |
| 634 | Found 0 lpt ports |
| 635 | Found 2 serial ports |
| 636 | ATA controller 1 at 1f0/3f4/0 (irq 14 dev 7a) |
| 637 | ATA controller 2 at 170/374/0 (irq 15 dev 7a) |
| 638 | ata0-0: HMS360404D5CF00 ATA-4 Hard-Disk (3906 MiBytes) |
| 639 | Searching bootorder for: /pci@i0cf8/*@f,2/drive@0/disk@0 |
| 640 | All threads complete. |
| 641 | Scan for option roms |
| 642 | |
| 643 | Press F12 for boot menu. |
| 644 | |
| 645 | Searching bootorder for: HALT |
| 646 | drive 0x000f2050: PCHS=7936/16/63 translation=large LCHS=992/128/63 s=7999488 |
| 647 | Space available for UMB: c0000-ef000, f0000-f2050 |
| 648 | Returned 65536 bytes of ZoneHigh |
| 649 | e820 map has 5 items: |
| 650 | 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 651 | 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 652 | 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 653 | 3: 0000000000100000 - 000000000f7b0000 = 1 RAM |
| 654 | 4: 000000000f7b0000 - 000000000f7e0000 = 2 RESERVED |
| 655 | enter handle_19: |
| 656 | NULL |
| 657 | Booting from Hard Disk... |
| 658 | Booting from 0000:7c00 |
| 659 | |