Matt DeVillier | 2d28422 | 2015-02-12 16:41:50 -0600 | [diff] [blame] | 1 | coreboot.rom: 8192 kB, bootblocksize 1944, romsize 8388608, offset 0x700000 |
| 2 | alignment: 64 bytes, architecture: x86 |
| 3 | |
| 4 | Name Offset Type Size |
| 5 | cmos_layout.bin 0x700000 cmos_layout 1164 |
| 6 | pci8086,0406.rom 0x7004c0 optionrom 65536 |
| 7 | cpu_microcode_blob.bin 0x710500 microcode 43072 |
Matt DeVillier | dcf11a0 | 2015-02-12 17:02:31 -0600 | [diff] [blame] | 8 | config 0x71adc0 raw 5285 |
| 9 | revision 0x71c2c0 raw 693 |
| 10 | (empty) 0x71c5c0 null 14744 |
| 11 | fallback/romstage 0x71ff80 stage 40485 |
| 12 | fallback/ramstage 0x729e40 stage 87539 |
Matt DeVillier | 2d28422 | 2015-02-12 16:41:50 -0600 | [diff] [blame] | 13 | fallback/payload 0x73f480 payload 43018 |
| 14 | (empty) 0x749d00 null 352920 |
| 15 | mrc.bin 0x79ffc0 (unknown) 191236 |
| 16 | (empty) 0x7ceb40 null 70744 |
| 17 | mrc.cache 0x7dffc0 (unknown) 65536 |
| 18 | (empty) 0x7f0000 null 63512 |